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---
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title: "Enabling Coherent FPGA Acceleration"
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date: "2015-01-16"
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categories:
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- "blogs"
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---
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**Speaker:** [Allan Cantle](https://www.linkedin.com/profile/view?id=1004910&authType=NAME_SEARCH&authToken=ckHg&locale=en_US&srchid=32272301421438603123&srchindex=1&srchtotal=1&trk=vsrp_people_res_name&trkInfo=VSRPsearchId%3A32272301421438603123%2CVSRPtargetId%3A1004910%2CVSRPcmpt%3Aprimary) – President & Founder, Nallatech **Speaker Organization:** ISI / Nallatech
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### Presentation Objective
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To introduce the audience to IBM’s Coherent Attached Processor Interface, CAPI, Hardware Development Kit, HDK, that is provided by Nallatech and provide an overview of FPGA Acceleration.
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### Abstract
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Heterogeneous Computing and the use of accelerators is becoming a generally accepted method of delivering efficient application acceleration. However, to date, there has been a lack of coordinated efforts to establish open industry standard methods for attaching and communicating between host processors and the various accelerators that are available today. With IBM’s OpenPOWER Foundation initiative, we now have the opportunity to effectively address this issue and dramatically improve the use and adoption of Accelerators.
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The presentation will introduce CAPI, Coherent Accelerator Processor Interface, to the audience and will detail the CAPI HDK, Hardware Development Kit, implementation that is offered to OpenPOWER customers through Nallatech. Several high level examples will be presented that show where FPGA acceleration brings significant performance gains and how these can often be further advantaged by the Coherent CAPI interface. Programming methodologies of the accelerator will also be explored where customers can either leverage pre-compiled accelerated libraries that run on the accelerator or where they can write their own Accelerated functions in OpenCL.
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### Speaker Bio
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Allan is the founder of Nallatech, established in 1993, that specializes in compute acceleration using FPGAs. As CEO, Allan focused Nallatech on helping customer’s port critical codes to Nallatech’s range of FPGA accelerators and pioneered several early tools that increased porting productivity. His prior background, with BAE Systems, was heavily involved in architecting Real Time, Heterogeneous Computers that tested live weapon systems and contained many parallel processors including Microprocessors, DSPs and FPGAs. Allan holds a 1st Class Honors EE BEng Degree from Plymouth University and a MSC in Corporate Leadership from Napier University.
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### Presentation
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<iframe src="https://openpowerfoundation.org/wp-content/uploads/2015/03/Cantle_OPFS2015_Nallatech_031315_final.pdf" width="100%" height="450" frameborder="0"></iframe>
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[Download Presentation](https://openpowerfoundation.org/wp-content/uploads/2015/03/Cantle_OPFS2015_Nallatech_031315_final.pdf)
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