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@ -1,5 +1,5 @@
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---
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title: "LibreBMC Workgroup"
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title: "LibreBMC SIG"
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wgtype: sig
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chair: paullecocq
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members:
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@ -9,28 +9,37 @@ members:
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- raptorcomputingsystems
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- vantosh
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- yadro
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- oregonstateuniversity
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participation: "Public"
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git: https://git.openpower.foundation/librebmc/librebmc/
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git: https://git.openpower.foundation/librebmc/
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discussion: https://discuss.openpower.foundation/c/sig/librebmc/
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chat: https://chat.openpower.foundation/opf/channels/librebmc
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date: 2021-03-15
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calendar:
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web: https://discuss.openpower.foundation/c/sig/librebmc/11/l/calendar
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ics: webcal://discuss.openpower.foundation/c/sig/librebmc/l/calendar.ics
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chat:
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mattermost: https://chat.openpower.foundation/opf/channels/librebmc
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slack: https://app.slack.com/client/T443QD9JA/C01UVKFKUQY
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irc: "#librebmc on irc.libera.chat"
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files: https://files.openpower.foundation/s/iZRseq3XLtRcjtX
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kanban: https://kanban.openpower.foundation/b/hgDqwnbiZDHFR3B3b/librebmc
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date: 2021-06-12
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draft: false
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---
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The LibreBMC SIG is a project workgroup whose purpose is to design an open source Baseboard Management Controller (BMC)
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based oncompatible with the Open Compute Project (OCP) DC-SCM specification.
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The goal of the SIG is to design the adapter, based on the POWERower ISA processor core,
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The goal of the SIG is to design the adapter, based on the POWER ISA processor core,
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and all required interfaces and controls using open source tools in order to contribute to their growth and usability.
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The purpose of LibreBMC is to create a fully open source BMC design which will enhance the security of server management control
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by being fully open and created with fully open source tooling. The use of an FPGA adds flexibility and security as well.
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The requirement of a POWERower ISA core will drive the design and open release of a new or improved POWER soft-core.
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The requirement of a POWER ISA core will drive the design and open release of a new or improved POWER soft-core.
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The scope of the LibreBMC SIG is the creation of a BMC adapter.
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The scope will include an adapter design with an FPGA controller.
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The FPGA will consist of a POWERower ISA core(s) that can run the OpenBMC stack (including LSB) and
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The FPGA will consist of a POWER ISA core(s) that can run the OpenBMC stack (including LSB) and
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manage the interface between system-management software and platform hardware.
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The FPGA will also have all controls and interfaces required of a typical BMC.
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@ -38,7 +47,7 @@ The LibreBMC adapter will conform be compatible with to the OCP DC-SCM specifica
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Any changes to the OCP DC-SCM specification is outside the scope of this workgroup and will be handled through OCP.
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The adapter should meet the requirements to manage a variety of server architectures,
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including but not limited to POWERower, ARM, and x86 based systems.
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including but not limited to POWER, ARM, and x86 based systems.
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Any changes to system reference designs or specifications to use the adapter are outside the scope of this workgroup.
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The scope of the workgroup will require the use of Linux, OpenBMC, open source tools, interfaces, and components.
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