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* add/sanitize all specification documents * add/sanitize all version of a specification * move to single vesioned documents * rename pages to be generic names * update template single layout to include tags and better layout Signed-off-by: Toshaan Bharvani <toshaan@vantosh.com>jamesk-patch-1
30 changed files with 562 additions and 58 deletions
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|
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--- |
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title: Advanced Accelerator Adapter Electro-Mechanical Specification |
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group: accelerator |
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publicreview: false |
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tags: |
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- specification |
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- accelerator |
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- power9 |
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- 25gbps |
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- 25gio |
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- capi30 |
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- opencapi |
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date: 2018-01-17 |
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draft: false |
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--- |
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|
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The Advanced Accelerator Adapter Electro-Mechanical Specification defines an electro-mechanical specification for |
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advanced accelerator adapters within the OpenPOWER eco-system supported by IBM® POWER9™. |
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POWER9 modules present a 25Gbps interface organized into groups of 8 bit-lanes. |
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Innovation within the community is encouraged for systems that support accelerated computing and |
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the accelerator adapters needed to make heterogeneous / accelerated computing solutions available to the market. |
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|
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This specification defines two accelerator approaches. |
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The first approach is a mezzanine card attached to the system planar via two connectors. |
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This approach is defined in Part I: Mezzanine Adapter Card. |
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|
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The second approach is via cable and is defined in Cabled Interface Extension. |
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While the accelerator card form factor is not defined in this specification Part II : Cabled Interface Extension assumes a PCIe® card for illustration. |
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|
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The electrical characteristics of the 25Gbps channel are defined in Part III: 25 Gbit/sec Electrical Channel. |
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|
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This document is a Standard Track, Workgroup Specification work product owned by the 25G IO Interoperability Workgroup and |
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handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document. |
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It was created using the Document Development Guide version 1.1.0. |
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Comments, questions, etc. can be submitted to the public mailing list for this document at <25giomode-p9_25gbps_phy@mailinglist.openpowerfoundation.org>. |
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|
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--- |
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title: Coherent Accelerator Interface Architecture |
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group: hardwarearchitecture |
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reviewdraft: false |
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aliases: |
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- "coherentacceleratorinterfacearchitecture/" |
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- "caia1/" |
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- "caia2/" |
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tags: |
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- specification |
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- caia |
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- capi |
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- power8 |
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- power9 |
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date: 2016-03-15 |
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draft: false |
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--- |
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|
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This document defines the Coherent Accelerator Interface Architecture (CAIA) for the IBM® POWER® systems. |
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The information contained in this document allows various CAIA-compliant accelerator implementations |
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to meet the needs of a wide variety of systems and applications. |
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Compatibility with the CAIA allows applications and system software to migrate from one implementation to another with minor changes. |
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|
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--- |
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title: Field Replaceable Unit Service Interface Specification |
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group: hardwarearchitecture |
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publicreview: false |
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aliases: |
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- "openfsi/" |
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- "openfieldserviceinterface/" |
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- "fieldserviceinterface/" |
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tags: |
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- specification |
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- fsi |
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- fru |
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- openfsi |
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- hardware |
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date: 2016-10-13 |
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draft: false |
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--- |
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|
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This document describes a Field Replaceable Unit (FRU) Support Interface (FSI) suited |
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to service all chips in a computer system via a common serial interface. |
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Key features are ease of use, easy scalability, robustness, and support for virtualization and |
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the tunneling of interrupts and DMA control signals across the interface. |
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FSI is superior to similar industry standard interfaces in these and many other features including speed, distance, data protection, and address range. |
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|
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FSI is a point to point two wire interface operating in half duplex mode, |
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which is capable of supporting distances of up to 4 meters at up to 166 MHz bus frequency. |
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All operations are fully CRC checked to allow error recovery. |
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With its versatile architecture, the FSI is suited for a wide range of applications from service access to in-system test. |
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|
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--- |
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title: IO Design Architecture (IODA) Specification |
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group: hardwarearchitecture |
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publicreview: false |
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tsth: false |
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tags: |
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- specification |
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- hardware |
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- reference |
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- pcie |
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- phb |
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- ioda |
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- power8 |
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- power9 |
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date: 2016-03-15 |
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draft: false |
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--- |
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|
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The purpose of the OpenPOWER I/O Design Architecture (IODA) specification is to describe the chip architecture for key aspects of |
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PCIe® based host bridge (PHB) designs for IBM® POWER systems. |
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|
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--- |
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title: "Instruction Set Architecture" |
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group: isa |
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publicreview: false |
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aliases: |
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- "powerisa/" |
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- "power31/" |
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- "powerisa31/" |
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- "power30/" |
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- "powerisa30/" |
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- "power207/" |
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- "powerisa207/" |
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tags: |
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- instructionsetarchitecture |
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- isa |
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- powerisa |
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- cores |
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- power8 |
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- power9 |
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- power10 |
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date: 2021-08-30 |
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draft: false |
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--- |
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|
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The Power Instruction Set Architecture (ISA) Version is a specification that describes the architecture used for the IBM POWER processor. |
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It defines the instructions the processors execute. |
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It is comprised of three books and a set of appendices. |
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- Book I |
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- Power ISA User Instruction Set Architecture, covers the base instruction set and related facilities available to the application programmer. |
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- Book II |
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- Power ISA Virtual Environment Architecture, defines the storage model and related instructions and facilities available to the application programmer. |
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- Book III |
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- Power ISA Operating Environment Architecture, defines the supervisor instructions and related facilities. |
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|
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--- |
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|
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|
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--- |
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|
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The purpose of this document is to detail a stable platform architecture to be used by platforms defined by the POWER ISA Specification. |
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|
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This architecture specification provides a comprehensive computer system platform-to-software interface definition, |
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combined with minimum system requirements, that enables the development of and software porting to |
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a range of compatible industry-standard computer systems from workstations through servers. |
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These systems are based on the requirements defined in the Power Instruction Set Architecture (ISA). |
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The definition supports the development of both uni-processor and multi-processor system implementations. |
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|
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This document is a Standard Track, Work Group Specification work product owned by the System Software Workgroup and |
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handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document. |
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It was created using the Master Template Guide version 1.0.0. |
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Comments, questions, etc. can be submitted to the public mailing list for this document at syssw-linux_architecture_ref@mailinglist.openpowerfoundation.org. |
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|
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--- |
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title: Memory Bus Specification |
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group: memory |
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publicreview: false |
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alias: |
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- "openpowermemorybus/" |
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- "opmb/" |
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tags: |
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- hardware |
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- memory |
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- memorybus |
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date: 2021-05-26 |
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draft: false |
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--- |
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|
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The OpenPOWER Memory Bus (OPMB) Specification defines the OpenPOWER Memory Bus Architecture. |
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The architecture and specification are used to develop Memory Function Units (MFU) and |
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to integration of those MFUs into the OpenPOWER system structure. |
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An MFU is a logic block developed by a member of the OpenPOWER eco-system to attach special purpose memory technology and |
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function processing for data stored in the memory technology. |
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An example of MFU might be a database function accelerator which attaches dense flash memory technology. |
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|
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This figure illustrates the concept. |
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{{< image src="specifications/opmb-mbd.png" width="750" height="750" >}} |
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|
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Comments regarding the specification content and suggestions for updates may be submitted to the following mailing list: |
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<memwg-opmb@mailinglist.openpowerfoundation.org> |
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|
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--- |
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title: OpenCAPI POWER Platform Architecture Guide |
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group: systemsoftware |
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publicreview: false |
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tags: |
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- opencapi |
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- firmware |
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- operatingsystem |
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date: 2019-01-18 |
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draft: false |
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--- |
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|
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The OpenCAPI POWER Platform Architecture (OCPA) defines an accelerator interface structure for |
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coherently attaching accelerators to the IBM Power Systems™ using an OpenCAPI Physical Link. |
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The intent is to allow implementation of a wide range of accelerators to optimally address many different market segments. |
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The target audience is firmware and operating system developers. |
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|
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--- |
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title: PSL / AFU Interface Specification |
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group: accelerator |
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publicreview: false |
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tags: |
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- powerservicelayer |
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- psl |
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- acceleratorfunctionalunit |
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- afu |
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- accelerator |
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- capi1 |
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- capi2 |
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- pcie4 |
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- power8 |
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- power9 |
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date: 2016-03-15 |
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draft: false |
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--- |
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|
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A CAPI based accelerator interfaces to the POWER system through a logic unit called the Power Service Layer (PSL). |
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The Accelerator Function Unit (AFU) contains the logic that implements the unique acceleration function. |
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|
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The POWER Service Layer to Accelerator Functional Unit (PSL / AFU) interface communicates to the acceleration logic running on the FPGA. |
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Through this interface, the PSL offers services to the AFU. |
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The services offered are cache-line oriented and allow the AFU to make buffering versus throughput trade-offs. |
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|
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The interface to the AFU is composed of six independent interfaces : |
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- AFU Command Interface is the interface through which the AFU sends service requests to the PSL. |
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- AFU Buffer Interface is the interface through which the PSL moves data to and from the AFU. |
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- PSL Response Interface is the interface through which the PSL reports status about service requests. |
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- AFU MMIO Interface is the interface through which software reads and writes can access registers within the AFU. |
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- AFU Control Interface allows the PSL job management functions to control the state of the AFU. |
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- AFU DMA Interface allows the AFU to send native PCIe Writes and Reads and to receive Read Completion data. |
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|
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Together these interfaces allow software to control the AFU state and allow the AFU to access data in the system. |
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|
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This document is a Standard Track, Work Group Specification work product owned by the Accelerator Workgroup and |
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handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document. |
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It was created using the Master Template Guide version 1.0.0. |
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Comments, questions, etc. can be submitted to the public mailing list for this document at <aclwg-afu_psl@mailinglist.openpowerfoundation.org>. |
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|
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--- |
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title: "PVIPR Compliance Specification" |
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tags: |
||||
- pvipr |
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date: 2021-03-22 |
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draft: false |
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--- |
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|
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This document provides requirements for a compiler to demonstrate compliance with the Power Vector Intrinsics Programming Reference, version 1.0. |
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|
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This document is a Standard Track, Workgroup Specification work product owned by the Compliance Workgroup |
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and handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document. |
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Comments, questions, etc. can be submitted to the public mailing list for the parent specification at |
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<openpower-pvipr-thts@mailinglist.openpowerfoundation.org>. |
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|
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The input to this specification is the following specification which describes the vector intrinsics expected to be provided |
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by compilers targeting PowerISA 2.07 and 3.0B or later, as implemented on POWER8 and POWER9 systems. |
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|
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Power Vector Intrinsics Programming Reference (PVIPR) which is published on the resource catalog: |
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https://openpowerfoundation.org/?resource_lib=power-vector-intrinsic-programming-reference |
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|
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The PVIPR document is organized into the following chapters: |
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1. Introduction to Vector Programming on Power |
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2. The Power Bi-Endian Vector Programming Model |
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3. Vector Programming Techniques |
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4. Vector Intrinsic Reference |
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5. Instruction/Intrinsic Cross-Reference |
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|
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--- |
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title: Vector Intrinsics Porting Guide |
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group: systemsoftware |
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publicreview: false |
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tags: |
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- software |
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- vectorintrinsics |
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- vector |
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- vmx |
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- vsx |
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- altivec |
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- optimization |
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date: 2018-01-08 |
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draft: |
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--- |
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|
||||
The goal of this project is to provide functional equivalents of the Intel MMX, SSE, and AVX intrinsic functions, |
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that are commonly used in Linux applications, and make them (or equivalents) available for the PowerPC64LE platform. |
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|
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This document is a Work Group Note work product owned by the System Software Workgroup and |
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handled in compliance with the requirements outlined in the OpenPOWER Foundation Work Group (WG) Process document. |
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Comments, questions, etc. can be submitted to the public mailing list for this document at <syssw-programming-guides@mailinglist.openpowerfoundation.org>. |
||||
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|
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versions: |
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- number: "1.0" |
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- number: "2.1.0" |
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date: "2014-07-21" |
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description: "Initial release." |
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download: "https://files.openpower.foundation/s/XqEfC9EKNWzgneb" |
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- number: "1.1" |
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- number: "2.1.1" |
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date: "2015-07-16" |
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description: "Incorporate errata." |
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download: "https://files.openpower.foundation/s/aybzqzEpN5AGfXG" |
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- number: "1.2" |
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- number: "2.1.2" |
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date: "2016-06-13" |
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description: "POWER8 errata" |
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- number: "1.3" |
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- number: "2.1.3" |
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date: "2016-06-13" |
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description: "POWER9 errata" |
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- number: "1.4" |
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- number: "2.1.4" |
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date: "2017-01-13" |
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description: "Conversion from FrameMaker to DocBook, minor corrections." |
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download: "https://files.openpower.foundation/s/aqwWeS3qmoaDyos" |
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- number: "1.5" |
||||
- number: "2.1.5" |
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date: "2020-12-01" |
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description: "POWER10 support" |
||||
download: "https://files.openpower.foundation/s/cfA2oFPXbbZwEBK" |
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@@ -0,0 +1,32 @@
|
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versions: |
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- number: 0.1 |
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date: 2017-03-13 |
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description: Creation of electo-mechanical consolidated specification |
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- number: 0.2 |
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date: 2017-04-27 |
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description: Review updates from Dan Dreps & Jeff Brown |
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- number: 0.3 |
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date: 2017-06-27 |
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description: Added part on cable extender version |
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- number: 0.4 |
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date: 2017-07-20 |
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description: Updates from workgroup review |
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- number: 0.5 |
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date: 2017-08-01 |
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description: Updates from workgroup review |
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- number: 0.6 |
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date: 2017-08-02 |
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description: Updates to table 5.1 about ILD, ILDB, and "moving average smoothing" |
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- number: 0.7 |
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date: 2017-08-08 |
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description: Added section on Conformance, additional minor edits, removed Section 6.2 Mezzanine Net Model |
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- number: 0.8 |
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date: 2017-08-17 |
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description: public review draft |
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- number: 0.9 |
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date: 2017-10-19 |
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description: Modified mezzanine card section 2.1,2., and 2.3 to reflect a reference design and connector PN |
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- number: 1.0 |
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date: 2017-11-08 |
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description: workgroup specification |
||||
download: https://files.openpower.foundation/s/xSQPe6ypoakKQdq |
||||
@ -0,0 +1,27 @@
@@ -0,0 +1,27 @@
|
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versions: |
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- number: 0.1 |
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date: 2014-12-09 |
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description: intital release |
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- number: 0.2 |
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date: 2015-08-15 |
||||
description: changes from wg review |
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- number: 0.3 |
||||
date: 2015-10-07 |
||||
description: conversion to docbook from framemaker |
||||
- number: 0.9 |
||||
date: 2015-10-26 |
||||
description: public review draft |
||||
- number: 1.0 |
||||
date: 2016-01-13 |
||||
description: workgroup specification |
||||
download: https://files.openpower.foundation/s/kpYmfrSREq8wFXR |
||||
- number: 1.1 |
||||
date: 2017-06-15 |
||||
description: conversion from framemaker |
||||
- number: 1.2 |
||||
date: 2018-07-02 |
||||
description: internal review |
||||
- number: 1.9 |
||||
date: 2020-03-23 |
||||
description: public review |
||||
download: https://files.openpower.foundation/s/EMFd9nPCx8N8tPr |
||||
@ -0,0 +1,17 @@
@@ -0,0 +1,17 @@
|
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versions: |
||||
- number: 0.1 |
||||
date: 2015-09-01 |
||||
description: creation based on IBM FSI spec contib |
||||
- number: 0.2 |
||||
date: 2015-09-02 |
||||
description: comment correction as per review |
||||
- number: 0.3 |
||||
date: 2016-05-05 |
||||
description: public review draft |
||||
- number: 0.4 |
||||
date: 2016-08-16 |
||||
description: correction chapter 1 added definition & chapter 4 typo |
||||
- number: 1.0.0 |
||||
date: 2016-12-12 |
||||
description: workgroup specification |
||||
download: |
||||
@ -0,0 +1,15 @@
@@ -0,0 +1,15 @@
|
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versions: |
||||
- number: 2.0.7 |
||||
date: 2015-04-23 |
||||
description: Creation based on IBM IODA2 Specification |
||||
- number: 2.0.8 |
||||
date: 2015-08-21 |
||||
description: Clean-up of typo/conversion errors |
||||
- number: 2.0.9 |
||||
date: 2015-10-01 |
||||
description: Clean-up of typo/conversion errors |
||||
- number: 2.1.0 |
||||
date: 2016-01-13 |
||||
description: Clean-up legal wording and added foundation info appendix |
||||
download: https://files.openpower.foundation/s/BcARpp9gFMXwqrL |
||||
# - number: 3.0 |
||||
@ -0,0 +1,29 @@
@@ -0,0 +1,29 @@
|
||||
versions: |
||||
- number: "1.1" |
||||
date: 2016-03-24 |
||||
download: https://files.openpower.foundation/s/LmdoZDGkJqp679y |
||||
- number: "2.1" |
||||
date: 2016-05-04 |
||||
description: conversion from IBM document |
||||
- number: "2.2" |
||||
date: 2016-10-11 |
||||
description: include latest PAPR ACR 2.8 |
||||
- number: "2.3" |
||||
date: 2018-07-30 |
||||
description: preparation for wg review |
||||
- number: "2.4" |
||||
date: 2019-01-08 |
||||
description: update from wg review |
||||
- number: "2.5" |
||||
date: 2020-04-06 |
||||
description: include latest PARP ACR 2.9 |
||||
- number: "2.6" |
||||
date: 2020-04-20 |
||||
description: update formatting |
||||
- number: "2.7" |
||||
date: 2020-06-11 |
||||
description: public review |
||||
- number: "2.9" |
||||
date: 2020-08-12 |
||||
description: workgroup note |
||||
download: https://files.openpower.foundation/s/ZmtZyCGiJ2oJHim |
||||
@ -0,0 +1,27 @@
@@ -0,0 +1,27 @@
|
||||
versions: |
||||
- number: 0.40 |
||||
date: 2017-10-05 |
||||
- number: 0.41 |
||||
date: 2020-05-21 |
||||
- number: 0.42 |
||||
date: 2020-06-04 |
||||
- number: 0.43 |
||||
date: 2020-07-30 |
||||
- number: 0.50 |
||||
date: 2020-08-30 |
||||
- number: 0.51 |
||||
date: 2020-08-30 |
||||
- number: 0.52 |
||||
date: 2020-09-10 |
||||
- number: 0.53 |
||||
date: 2020-09-10 |
||||
- number: 0.90 |
||||
date: 2020-10-08 |
||||
- number: 0.91 |
||||
date: 2020-10-11 |
||||
- number: 0.92 |
||||
date: 2021-02-01 |
||||
- number: 0.93 |
||||
date: 2021-04-08 |
||||
- number: 1.93 |
||||
date: 2021-04-26 |
||||
@ -0,0 +1,17 @@
@@ -0,0 +1,17 @@
|
||||
versions: |
||||
- number: "2.6" |
||||
date: 2018-01-15 |
||||
description: conversion from framemaker |
||||
- number: "2.7" |
||||
date: 2018-04-09 |
||||
description: minor editing for first draft |
||||
- number: "2.8" |
||||
date: 2018-07-02 |
||||
description: more editing |
||||
- number: "2.9" |
||||
date: 2018-07-26 |
||||
description: public review draft |
||||
- number: "3.0" |
||||
date: 2019-01-18 |
||||
description: workgroup note |
||||
download: https://files.openpower.foundation/s/DwnMymtj9BRQQ2y |
||||
@ -0,0 +1,21 @@
@@ -0,0 +1,21 @@
|
||||
versions: |
||||
- number: "2.07" |
||||
date: "2013-05-03" |
||||
download: "" |
||||
description: "Initial release." |
||||
- number: "2.07b" |
||||
date: "2017-03-28" |
||||
description: "Update specification." |
||||
download: "https://ibm.ent.box.com/s/jd5w15gz301s5b5dt375mshpq9c3lh4u" |
||||
- number: "3.0b" |
||||
date: "2017-03-29" |
||||
download: "https://ibm.ent.box.com/s/1hzcwkwf8rbju5h9iyf44wm94amnlcrv" |
||||
description: "Initial release." |
||||
- number: "3.0c" |
||||
date: "2020-05-01" |
||||
download: "https://files.openpower.foundation/s/XXFoRATEzSFtdG8" |
||||
description: "Incorporate errata." |
||||
- number: "3.1" |
||||
date: "2020-05-02" |
||||
download: "https://files.openpower.foundation/s/bo728kgiWfgMHAr" |
||||
description: "Initial release." |
||||
@ -0,0 +1,25 @@
@@ -0,0 +1,25 @@
|
||||
versions: |
||||
- number: 0.1.0 |
||||
date: 2015-04-14 |
||||
description: IBM CAPI documentation conversion |
||||
- number: 1.0.0 |
||||
date: 2015-10-20 |
||||
description: workgroup specification |
||||
download: https://files.openpower.foundation/s/drQqcZEcBfLEYcf |
||||
- number: 1.0.1 |
||||
date: 2016-09-13 |
||||
description: clarification data alignment, parity, partial cacheline |
||||
download: https://files.openpower.foundation/s/yLreYMysGbZiYiT |
||||
- number: 1.1 |
||||
date: 2016-05-18 |
||||
description: conversion from IBM internal documentation |
||||
- number: 1.2 |
||||
date: 2016-08-02 |
||||
description: updates for v2 |
||||
- number: 1.3 |
||||
description: Fixes to CAS Operand Alignment on Buffer Interface |
||||
date: 2017-01-16 |
||||
- number: 2.0 |
||||
date: 2017-07-20 |
||||
description: workgroup specification |
||||
download: https://files.openpower.foundation/s/SxLFti5e4a5gBTb |
||||
@ -0,0 +1,14 @@
@@ -0,0 +1,14 @@
|
||||
versions: |
||||
- number: "0.1" |
||||
date: 2017-07-26 |
||||
description: initial draft from Steve Munroe |
||||
- number: "0.2" |
||||
date: 2017-09-14 |
||||
description: Miscellaneous correction for spelling, grammar and punctuation |
||||
- number: "0.3" |
||||
date: 2017-10-30 |
||||
description: Updates to describe issues associated with larger vector sizes and proposed solutions |
||||
- number: "1.0" |
||||
date: 2018-03-14 |
||||
description: Minor updates for Published version |
||||
download: https://files.openpower.foundation/s/7FSEcPrjPH3xmp3 |
||||
@ -0,0 +1,5 @@
@@ -0,0 +1,5 @@
|
||||
versions: |
||||
- number: 1.0.0 |
||||
date: 2020-08-11 |
||||
description: |
||||
download: https://files.openpower.foundation/s/9nRDmJgfjM8MpR7 |
||||
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Reference in new issue