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ELFv2-ABI/specification/ch_preface.xml

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<?xml version="1.0" encoding="UTF-8"?>
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with no Invariants Sections, with no Front-Cover Texts,
and with no Back-Cover Texts (the "License");
you may not use this file except in compliance with the License.
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<preface xmlns="http://docbook.org/ns/docbook"
xmlns:xi="http://www.w3.org/2001/XInclude"
xmlns:xlink="http://www.w3.org/1999/xlink"
version="5.0"
xml:id="ch_ABI_preface">
<title>About this Document</title>
<para>This specification defines the OpenPOWER ELF V2 application binary interface (ABI).
This ABI is derived from and represents the first major update to the Power ABI since the
original release of the IBM® RS/6000® ABI. It was developed to make extensive use of new
functions available in OpenPOWER-compliant processors. It expects an OpenPOWER-compliant
processor to implement at least Power ISA V2.07B with all OpenPOWER Architecture instruction
categories as well as OpenPOWER-defined implementation characteristics for some
implementation-specific features.
</para>
<para>Specifically, to use this ABI and ABI-compliant programs, OpenPOWER-compliant
processors must implement the following categories:
<itemizedlist>
<listitem><para>Base</para></listitem>
<listitem><para>64-Bit</para></listitem>
<listitem><para>Server (subject to system-level requirements)</para></listitem>
<listitem><para>Floating-Point</para></listitem>
<listitem><para>Floating-Point.Record</para></listitem>
<listitem><para>Load/Store Quadword x2</para></listitem>
<listitem><para>Store Conditional Page Mobility (subject to system-level requirements)</para></listitem>
<listitem><para>Stream</para></listitem>
<listitem><para>Transactional Memory</para></listitem>
<listitem><para>Vector</para></listitem>
<listitem><para>Vector.Little-Endian</para></listitem>
<listitem><para>Vector-Scalar</para></listitem>
</itemizedlist>
</para>
<para>For more information about these categories, see “Categories” in Book I of
<citetitle>Power ISA</citetitle>, version 2.07B.
</para>
<para>The OpenPOWER ELF V2 ABI is intended for use in little- and big-endian environments.
</para>
<simplesect>
<title>Notices</title>
<?dbhtml stop-chunking?>
<para>This document is based on the following publications:</para>
<para><citetitle>Power Architecture 32-bit Application Binary Interface Supplement 1.0</citetitle>
by Ryan S. Arnold, Greg Davis, Brian Deitrich, Michael Eager, Emil Medve, Steven J. Munroe,
Joseph S. Myers, Steve Papacharalambous, Anmol P. Paralkar, Katherine Stewart, and Edmar Wienskoski,
1.0 Edition. Published April 19, 2011. Copyright © 1999, 2003, 2004 IBM Corporation. Copyright © 2002
Freescale Semiconductor, Inc. Copyright © 2003, 2004 Free Standards Group. Copyright © 2011 Power.org
</para>
<para>Portions of <citetitle>Power Architecture 32-bit Application Binary Interface Supplement 1.0</citetitle>
are derived from the 64-bit PowerPC® ELF Application Binary Interface Supplement 1.8, originally written by
Ian Lance Taylor under contract for IBM, with later revisions by: David Edelsohn, Torbjorn Granlund,
Mark Mendell, Kristin Thomas, Alan Modra, Steve Munroe, and Chris Lorenze.
</para>
<para>The Thread Local Storage section of this document is an original contribution of IBM written by
Alan Modra and Steven Munroe.
</para>
<para>IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business
Machines Corp., registered in many jurisdictions worldwide. Other product and service names might be
trademarks of IBM or other companies. A current list of IBM trademarks is available on the Web at
“Copyright and trademark information” at
<link xlink:href="http://www.ibm.com/legal/copytrade.shtml">www.ibm.com/legal/copytrade.shtml</link>.
</para>
<para>The following terms are trademarks or registered trademarks licensed by Power.org in the
United States and/or other countries: Power ISA<superscript>TM</superscript>, Power Architecture®.
Information on the list of U.S. trademarks licensed by Power.org may be found at
<link xlink:href="http://www.power.org/about/brand-center/">www.power.org/about/brand-center/</link>.
</para>
<para>The following terms are trademarks or registered trademarks of Freescale Semiconductor
in the United States and/or other countries: AltiVec<superscript>TM</superscript>, e500<superscript>TM</superscript>.
Information on the list of U.S. trademarks owned by Freescale Semiconductor may be found at
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</para>
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trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
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Oracle and/or its affiliates.
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<para>Other company, product, and service names may be trademarks or service marks of others.
</para>
</simplesect>
</preface>