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112 lines
5.4 KiB
XML
112 lines
5.4 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<preface xmlns="http://docbook.org/ns/docbook"
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xmlns:xi="http://www.w3.org/2001/XInclude"
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xmlns:xlink="http://www.w3.org/1999/xlink"
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version="5.0"
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xml:id="ch_ABI_preface">
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<title>About this Document</title>
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<para>This specification defines the OpenPOWER ELF V2 application binary interface (ABI).
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This ABI is derived from and represents the first major update to the Power ABI since the
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original release of the IBM® RS/6000® ABI. It was developed to make extensive use of new
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functions available in OpenPOWER-compliant processors. It expects an OpenPOWER-compliant
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processor to implement at least Power ISA V2.07B with all OpenPOWER Architecture instruction
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categories as well as OpenPOWER-defined implementation characteristics for some
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implementation-specific features.
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</para>
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<para>Specifically, to use this ABI and ABI-compliant programs, OpenPOWER-compliant
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processors must implement the following categories:
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<itemizedlist>
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<listitem><para>Base</para></listitem>
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<listitem><para>64-Bit</para></listitem>
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<listitem><para>Server (subject to system-level requirements)</para></listitem>
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<listitem><para>Floating-Point</para></listitem>
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<listitem><para>Floating-Point.Record</para></listitem>
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<listitem><para>Load/Store Quadword x2</para></listitem>
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<listitem><para>Store Conditional Page Mobility (subject to system-level requirements)</para></listitem>
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<listitem><para>Stream</para></listitem>
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<listitem><para>Transactional Memory</para></listitem>
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<listitem><para>Vector</para></listitem>
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<listitem><para>Vector.Little-Endian</para></listitem>
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<listitem><para>Vector-Scalar</para></listitem>
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</itemizedlist>
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</para>
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<para>For more information about these categories, see “Categories” in Book I of
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<citetitle>Power ISA</citetitle>, version 2.07B.
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</para>
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<para>The OpenPOWER ELF V2 ABI is intended for use in little- and big-endian environments.
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</para>
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<section>
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<title>Notices</title>
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<?dbhtml stop-chunking?>
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<para>This document is based on the following publications:</para>
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<para><citetitle>Power Architecture 32-bit Application Binary Interface Supplement 1.0</citetitle>
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by Ryan S. Arnold, Greg Davis, Brian Deitrich, Michael Eager, Emil Medve, Steven J. Munroe,
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Joseph S. Myers, Steve Papacharalambous, Anmol P. Paralkar, Katherine Stewart, and Edmar Wienskoski,
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1.0 Edition. Published April 19, 2011. Copyright © 1999, 2003, 2004 IBM Corporation. Copyright © 2002
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Freescale Semiconductor, Inc. Copyright © 2003, 2004 Free Standards Group. Copyright © 2011 Power.org
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</para>
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<para>Portions of <citetitle>Power Architecture 32-bit Application Binary Interface Supplement 1.0</citetitle>
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are derived from the 64-bit PowerPC® ELF Application Binary Interface Supplement 1.8, originally written by
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Ian Lance Taylor under contract for IBM, with later revisions by: David Edelsohn, Torbjorn Granlund,
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Mark Mendell, Kristin Thomas, Alan Modra, Steve Munroe, and Chris Lorenze.
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</para>
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<para>The Thread Local Storage section of this document is an original contribution of IBM written by
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Alan Modra and Steven Munroe.
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</para>
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<para>IBM, the IBM logo, and ibm.com are trademarks or registered trademarks of International Business
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Machines Corp., registered in many jurisdictions worldwide. Other product and service names might be
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trademarks of IBM or other companies. A current list of IBM trademarks is available on the Web at
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“Copyright and trademark information” at
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<link xlink:href="http://www.ibm.com/legal/copytrade.shtml">www.ibm.com/legal/copytrade.shtml</link>.
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</para>
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<para>The following terms are trademarks or registered trademarks licensed by Power.org in the
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United States and/or other countries: Power ISA<superscript>TM</superscript>, Power Architecture®.
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Information on the list of U.S. trademarks licensed by Power.org may be found at
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<link xlink:href="http://www.power.org/about/brand-center/">www.power.org/about/brand-center/</link>.
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</para>
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<para>The following terms are trademarks or registered trademarks of Freescale Semiconductor
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in the United States and/or other countries: AltiVec<superscript>TM</superscript>, e500<superscript>TM</superscript>.
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Information on the list of U.S. trademarks owned by Freescale Semiconductor may be found at
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<link xlink:href="http://www.freescale.com/files/abstract/help_page/TERMSOFUSE.html">www.freescale.com/files/abstract/help_page/TERMSOFUSE.html</link>.
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</para>
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<para>Itanium, Intel logo, Intel Inside logo, and Intel Centrino logo are trademarks or registered
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trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
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</para>
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<para>Linux is a trademark of Linus Torvalds in the United States, other countries, or both.
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</para>
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<para>Java, and all Java-based trademarks and logos are trademarks or registered trademarks of
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Oracle and/or its affiliates.
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</para>
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<para>Other company, product, and service names may be trademarks or service marks of others.
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</para>
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</section>
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</preface>
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