`Signed-off-by: Bill Schmidt <wschmidt@linux.ibm.com>`
 `@ -18342,27 +18342,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18342,27 +18342,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_signede` ` Vector ... Spelled Out Name TBD` ` Vector Convert Double-Precision to Signed Word Even` ` ` ` r = vec_signede (ARG1)` ` r = vec_signede (a)` ` ` ` Purpose:` ` Converts an input vector to a vector of signed integers.` ` ` ` Result value: The even target elements are obtained by truncating the source elements to signed integers as follows:` `Target elements 0 and 2 contain the converted values of the` ` input vector.` ` Converts elements of an input vector to signed integers and stores` ` them in the even-numbered elements of the result vector.` ` ` ` Result value: Element 0 of` ` r contains element 0 of a, truncated to a signed integer. Element 2 of` ` r contains element 1 of a, truncated to a signed integer.` ` Endian considerations:` ` None.` ` The element numbering within a register is left-to-right for big-endian` ` targets, and right-to-left for little-endian targets.` ` ` ` ` ` ` ` Supported type signatures for vec_signede` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` `@ -18372,11 +18377,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18372,11 +18377,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` Example Implementation` ` Example LE` ` Implementation` ` ` ` ` ` Example BE` ` Implementation` ` ` ` ` ` ` `@ -18389,7 +18399,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18389,7 +18399,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector double` ` ` ` ` ` sample implementation TBD` ` ` ` xvdvdpsxws t,a` ` vsldoi r,t,t,12` ` ` ` ` ` ` ` ` ` xvdvdpsxws t,a` ` ` ` ` ` ` ` ` `@ -18401,27 +18420,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18401,27 +18420,32 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_signedo` ` Vector ... Spelled Out Name TBD` ` Vector Convert Double-Precision to Signed Word Odd` ` ` ` r = vec_signedo (ARG1)` ` r = vec_signedo (a)` ` ` ` Purpose:` ` Converts an input vector to a vector of signed integers.` ` ` ` Result value: The odd target elements are obtained by truncating the source elements to signed integers as follows:` `Target elements 1 and 3 contain the converted values of the` ` input vector.` ` Converts elements of an input vector to signed integers and stores them` ` in the odd-numbered elements of the result vector.` ` ` ` Result value: Element 1 of` ` r contains element 0 of a, truncated to a signed integer. Element 3 of` ` r contains element 1 of a, truncated to a signed integer.` ` Endian considerations:` ` None.` ` The element numbering within a register is left-to-right for big-endian` ` targets, and right-to-left for little-endian targets.` ` ` ` ` ` ` ` Supported type signatures for vec_signedo` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` `@ -18431,11 +18455,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18431,11 +18455,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` Example Implementation` ` Example LE` ` Implementation` ` ` ` ` ` Example BE` ` Implementation` ` ` ` ` ` ` `@ -18448,7 +18477,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18448,7 +18477,16 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector double` ` ` ` ` ` sample implementation TBD` ` ` ` xvcvdpsxws r,a` ` ` ` ` ` ` ` ` ` xvcvdpsxws t,a` ` vsldoi r,t,t,12` ` ` ` ` ` ` ` ` `@ -18460,15 +18498,20 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18460,15 +18498,20 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_sl` ` Vector ... Spelled Out Name TBD` ` Vector Shift Left` ` ` ` r = vec_sl (ARG1, ARG2)` ` r = vec_sl (a, b)` ` ` ` Purpose:` ` Performs a left shift for each element of a vector.` ` ` ` Result value: Each element of the result vector is the result of left shifting the corresponding element of ARG1 by the number of bits specified by the value of the corresponding element of ARG2, modulo the number of bits in the element. The bits that are shifted out are replaced by zeros.` ` Result value: Each element of` ` r is the result of left-shifting the` ` corresponding element of a by the` ` number of bits specified by the corresponding element of b, modulo the number of bits in the element.` ` Zeros are shifted in from the right.` ` Endian considerations:` ` None.` ` ` `@ -18489,12 +18532,12 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18489,12 +18532,12 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` ` ` ARG2` ` b` ` ` ` ` ` ` `@ -18514,7 +18557,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18514,7 +18557,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vslb r,a,b` ` ` ` ` ` ` ` ` `@ -18528,7 +18573,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18528,7 +18573,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vslb r,a,b` ` ` ` ` ` ` ` ` `@ -18542,7 +18589,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18542,7 +18589,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned int` ` ` ` ` ` sample implementation TBD` ` ` ` vslw r,a,b` ` ` ` ` ` ` ` ` `@ -18556,7 +18605,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18556,7 +18605,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned int` ` ` ` ` ` sample implementation TBD` ` ` ` vslw r,a,b` ` ` ` ` ` ` ` ` `@ -18570,7 +18621,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18570,7 +18621,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned long long` ` ` ` ` ` sample implementation TBD` ` ` ` vsld r,a,b` ` ` ` ` ` ` ` ` `@ -18584,7 +18637,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18584,7 +18637,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned long long` ` ` ` ` ` sample implementation TBD` ` ` ` vsld r,a,b` ` ` ` ` ` ` ` ` `@ -18598,7 +18653,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18598,7 +18653,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned short` ` ` ` ` ` sample implementation TBD` ` ` ` vslh r,a,b` ` ` ` ` ` ` ` ` `@ -18612,7 +18669,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18612,7 +18669,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned short` ` ` ` ` ` sample implementation TBD` ` ` ` vslh r,a,b` ` ` ` ` ` ` ` ` `@ -18624,17 +18683,34 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18624,17 +18683,34 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_sld` ` Vector ... Spelled Out Name TBD` ` Vector Shift Left Double` ` ` ` r = vec_sld (ARG1, ARG2, ARG3)` ` r = vec_sld (a, b, c)` ` ` ` Purpose:` ` Left shifts a double vector (that is, two concatenated vectors) by a given number of bytes. For vec_sld being performed on the vector bool and floating-point types, the result is undefined, when the specified shift count is not a multiple of the element size.` ` ` ` Result value: The result is the most-significant 16 bytes obtained by concatenating ARG1 and ARG2 and shifting left by the number of bytes specified by ARG3, which should be in the range 0–15.` ` Left shifts a double vector (that is, two concatenated vectors) by a` ` given number of bytes. For vec_sld being performed on the vector bool` ` and floating-point types, the result is undefined when the specified` ` shift count is not a multiple of the element size.` ` ` ` Result value: Vector r receives the most-significant 16 bytes obtained` ` by concatenating a and b and shifting left by the number of bytes` ` specified by c, which must be in the` ` range 0–15.` ` Endian considerations:` ` None.` ` This intrinsic is not endian-neutral, so uses of` ` vec_sld in big-endian code must be rewritten for little-endian targets.` ` Historically, vec_sld could be used to shift by amounts not a multiple` ` of the element size for most types, in which case the purpose of the` ` shift is difficult to determine and difficult to automatically rewrite` ` efficiently for little endian. So the concatenation of a and b is` ` done in big-endian fashion (left to right), and the shift is always` ` to the left. This will generally produce surprising results for` ` little-endian targets.` ` ` ` ` ` ` `@ -18647,24 +18723,24 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18647,24 +18723,24 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ` ` ` ` ` ` r` ` ` ` ` ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` ` ` ` ` ARG2` ` b` ` ` ` ` ` ` ` ` ` ` ` ARG3` ` c` ` ` ` ` ` ` `@ -18687,7 +18763,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18687,7 +18763,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18704,7 +18782,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18704,7 +18782,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18721,7 +18801,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18721,7 +18801,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18738,7 +18820,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18738,7 +18820,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18755,7 +18839,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18755,7 +18839,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18772,7 +18858,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18772,7 +18858,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18789,7 +18877,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18789,7 +18877,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18806,7 +18896,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18806,7 +18896,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18823,7 +18915,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18823,7 +18915,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18840,7 +18934,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18840,7 +18934,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18857,7 +18953,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18857,7 +18953,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18874,7 +18972,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18874,7 +18972,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18891,7 +18991,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18891,7 +18991,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18908,7 +19010,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18908,7 +19010,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18925,7 +19029,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18925,7 +19029,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` vsldoi r,a,b,c` ` ` ` ` ` ` ` ` `@ -18937,17 +19043,29 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18937,17 +19043,29 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_sldw` ` Vector ... Spelled Out Name TBD` ` Vector Shift Left Double by Words` ` ` ` r = vec_sldw (ARG1, ARG2, ARG3)` ` r = vec_sldw (a, b, c)` ` ` ` Purpose:` ` Returns a vector obtained by shifting left the concatenated input vectors by the number of specified words.` ` ` ` Result value: The value of each element is set to the value of an input element of the concatenated vectors ARG1 and ARG2, with the word offset to its right` ` Returns a vector obtained by shifting left the concatenated input` ` vectors by the number of specified words.` ` ` ` Result value: Vector r receives the most-significant 16 bytes obtained` ` by concatenating a and b and shifting left by the number of words` ` specified by c, which must be in the` ` range 0–3.` ` Endian considerations:` ` None.` ` This intrinsic is not endian-neutral, so uses of` ` vec_sldw in big-endian code must be rewritten for little-endian targets.` ` The concatenation of a and b is` ` done in big-endian fashion (left to right), and the shift is always` ` to the left. This will generally produce surprising results for` ` little-endian targets.` ` ` ` ` ` ` `@ -18960,27 +19078,27 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -18960,27 +19078,27 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ` ` ` ` ` ` r` ` ` ` ` ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` ` ` ` ` ARG2` ` b` ` ` ` ` ` ` ` ` ` ` ` ARG3` ` c` ` ` ` ` ` ` ` ` ` Example Implementation` ` ` ` ` `@ -19000,7 +19118,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19000,7 +19118,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19017,7 +19137,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19017,7 +19137,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19034,7 +19156,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19034,7 +19156,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19051,7 +19175,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19051,7 +19175,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19068,7 +19194,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19068,7 +19194,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19085,7 +19213,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19085,7 +19213,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19102,7 +19232,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19102,7 +19232,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19119,7 +19251,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19119,7 +19251,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` const int` ` ` ` ` ` sample implementation TBD` ` ` ` xxsldwi r,a,b,c` ` ` ` ` ` ` ` ` `@ -19131,17 +19265,25 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19131,17 +19265,25 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` vec_sll` ` Vector ... Spelled Out Name TBD` ` Vector Shift Left Long` ` ` ` r = vec_sll (ARG1, ARG2)` ` r = vec_sll (a, b)` ` ` ` Purpose:` ` Left shifts a vector by a given number of bits.` ` ` ` Result value: The result is the contents of ARG1, shifted left by the number of bits specified by the three least-significant bits of ARG2. The bits that are shifted out are replaced by zeros. The shift count must have been replicated into all bytes of the shift count specification.` ` Left shifts an entire vector by a given number of bits.` ` ` ` Result value: Vector` ` r contains the contents of a, shifted left by the number of bits specified` ` by the three least-significant bits of b. Zeros are supplied on the right. The shift` ` count must have been replicated into all bytes of b; if not, the value of r is undefined.` ` Endian considerations:` ` None.` ` This intrinsic is not endian-neutral, so uses of` ` vec_sll in big-endian code must be rewritten for little-endian targets.` ` ` ` ` ` ` `@ -19160,12 +19302,12 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19160,12 +19302,12 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` ` ` ` ` ` ` ARG1` ` a` ` ` ` ` ` ` ` ` ` ARG2` ` b` ` ` ` ` ` ` `@ -19185,7 +19327,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19185,7 +19327,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19199,7 +19343,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19199,7 +19343,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19213,7 +19359,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19213,7 +19359,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19227,7 +19375,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19227,7 +19375,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19241,7 +19391,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19241,7 +19391,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19255,7 +19407,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19255,7 +19407,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19269,7 +19423,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19269,7 +19423,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19283,7 +19439,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19283,7 +19439,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` ` `@ -19297,7 +19455,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics">` @@ -19297,7 +19455,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_vec_intrinsics"> ` vector unsigned char` ` ` ` ` ` sample implementation TBD` ` ` ` vsl r,a,b` ` ` ` ` ` ` ` `