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@ -34,7 +34,7 @@
<!-- TODO: Pick a Title for the new document -->
<title>Power Vector Intrinsic Programming Reference</title>
<!-- TODO: Either add a subtitle or remove the following line -->
<subtitle> </subtitle>
<!-- subtitle></subtitle -->

<info>
<author>
@ -54,7 +54,7 @@
<holder>OpenPOWER Foundation</holder>
</copyright>
<!-- TODO: Set the correct document releaseinfo -->
<releaseinfo>Revision 2.0.0_prd</releaseinfo>
<releaseinfo>Revision 1.0.0_prd3</releaseinfo>
<productname>OpenPOWER</productname>
<pubdate/>

@ -88,21 +88,31 @@
<revhistory>
<!-- TODO: Set the initial version information and clear any old information out -->
<revision>
<date>2021-09-08</date>
<date>2020-05-16</date>
<revdescription>
<itemizedlist spacing="compact">
<listitem>
<para>Version 2.0.0_prd public review draft</para>
<para>Version 1.0.0_prd3: Public Review Draft Revision 3</para>
</listitem>
</itemizedlist>
</revdescription>
</revision>
<revision>
<date>2020-08-11</date>
<date>2020-02-11</date>
<revdescription>
<itemizedlist spacing="compact">
<listitem>
<para>Version 1.0.0</para>
<para>Version 1.0.0_prd2: Public Review Draft Revision 2</para>
</listitem>
</itemizedlist>
</revdescription>
</revision>
<revision>
<date>2019-11-12</date>
<revdescription>
<itemizedlist spacing="compact">
<listitem>
<para>Version 1.0.0_prd: Public Review Draft</para>
</listitem>
</itemizedlist>
</revdescription>
@ -121,7 +131,6 @@
<xi:include href="ch_techniques.xml"/>
<xi:include href="ch_vec_reference.xml"/>
<!-- xi:include href="ch_scal_reference.xml"/ -->
<xi:include href="ch_mma_reference.xml"/>
<xi:include href="ch_isa_intrin_xref.xml"/>
<!-- xi:include href="app_a.xml"/ -->


@ -151,8 +151,8 @@ vector unsigned __int128 x = { (((unsigned __int128)0x1020304050607080) &lt;&lt;
it.
</para>
<para>
For the Fortran language, <phrase revisionflag="changed"><xref
linkend="VIPR.biendian.fortrantypes" /></phrase> gives a correspondence
For the Fortran language, <xref
linkend="VIPR.biendian.fortran-types" /> gives a correspondence
between Fortran and C/C++ language types.
</para>
<para>
@ -800,16 +800,10 @@ a[3] = c;</programlisting>
<para><code><xref linkend="vec_bperm" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_inserth"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_mergeh" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_signextll"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_signedo" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
@ -817,16 +811,10 @@ a[3] = c;</programlisting>
<para><code><xref linkend="vec_cipher_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_insertl"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_mergel" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_signextq"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_sld" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
@ -834,359 +822,221 @@ a[3] = c;</programlisting>
<para><code><xref linkend="vec_cipherlast_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mergee" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_mergeo" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_sld" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_sldw" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_clr_first"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_doublee" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mergeh" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_mfvscr" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_sldb" xrefstyle="select:title
nopage"/></code>
</para>
<para><code><xref linkend="vec_sll" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_clr_last"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_doubleh" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mergel" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_mule" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_sldw" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_slo" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_doublee" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_doublel" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mergeo" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_mulo" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_sll" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_slv" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_doubleh" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_doubleo" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mfvscr" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_ncipher_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_slo" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_splat" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_doublel" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_extract" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mule" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_ncipherlast_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_slv" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_srl" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_doubleo" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_extract_fp32_from_shorth" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_mulo" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_pack" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_splat" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_sro" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_extract" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_extract_fp32_from_shortl" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_ncipher_be" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_pack_to_short_fp32" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_splati_ins"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_srv" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_extract_fp32_from_shorth" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_extract4b" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_ncipherlast_be" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_packpx" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_srdb" xrefstyle="select:title
nopage"/></code>
</para>
<para><code><xref linkend="vec_sum2s" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_extract_fp32_from_shortl" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_first_match_index" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_pack" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_packs" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_srl" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_sums" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_extract4b" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_first_match_or_eos_index" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_pack_to_short_fp32" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_packsu" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_sro" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_unpackh" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_extracth"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_first_mismatch_index" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_packpx" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_perm" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_srv" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_unpackl" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_extractl"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_first_mismatch_or_eos_index" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_packs" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_permxor" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_stril"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_unsigned2" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_first_match_index" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_float2" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_packsu" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_pmsum_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_stril_p"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_unsignede" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_first_match_or_eos_index" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_floate" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_perm" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_reve" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_strir"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_unsignedo" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_first_mismatch_index" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_floato" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_permx"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_sbox_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xl" xrefstyle="select:title nopage"/></code> (ISA 2.07 only)</para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_strir_p"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_first_mismatch_or_eos_index" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_gb" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_permxor" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_shasigma_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xl_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_sum2s" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_float2" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_insert" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_pmsum_be" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_signed2" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xst" xrefstyle="select:title nopage"/></code> (ISA 2.07 only)</para>
</entry>
<entry>
<para><code><xref linkend="vec_sums" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_floate" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_insert4b" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_replace_elt"
xrefstyle="select:title nopage"/></code>
</para>
<para><code><xref linkend="vec_signede" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_unpackh"
xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_xst_be" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_floato" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_replace_unaligned"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<row>
<entry>
<para><code><xref linkend="vec_unpackl" xrefstyle="select:title nopage"/></code></para>
<para><code><xref linkend="vec_mergee" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_genbm"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_reve" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_unsigned2" xrefstyle="select:title nopage"/></code></para>
<para></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_gendm"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_sbox_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_unsignede" xrefstyle="select:title nopage"/></code></para>
<para></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_genhm"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_shasigma_be" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_unsignedo" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_genpcvm"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_signed2" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xl" xrefstyle="select:title nopage"/></code> (ISA 2.07 only)</para>
</entry>
</row>
<row>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_genwm"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_signede" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xl_be" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_insert" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_signedo" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para><code><xref linkend="vec_xst" xrefstyle="select:title nopage"/></code> (ISA 2.07 only)</para>
</entry>
</row>
<row>
<entry>
<para><code><xref linkend="vec_insert4b" xrefstyle="select:title nopage"/></code></para>
</entry>
<entry>
<para revisionflag="added">
<code><xref linkend="vec_signexti"
xrefstyle="select:title nopage"/></code>
</para>
</entry>
<entry>
<para><code><xref linkend="vec_xst_be" xrefstyle="select:title nopage"/></code></para>
</entry>
</row>
</row>
</tbody>
</tgroup>
</table>
@ -1340,14 +1190,13 @@ a[3] = c;</programlisting>
introduced serious compiler complexity without much utility.
Thus this support (previously controlled by switches
<code>-maltivec=be</code> and/or <code>-qaltivec=be</code>) is
now deprecated. Current versions of the <phrase
revisionflag="changed">GCC, Clang, and Open XL</phrase>
compilers do not implement this support.
now deprecated. Current versions of the GCC and Clang
open-source compilers do not implement this support.
</para>
</section>
</section>

<section revisionflag="deleted">
<section>
<title>Language-Specific Vector Support for Other
Languages</title>
<section>

@ -23,17 +23,13 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
<section>
<title>A Brief History</title>
<para>
The history of vector programming on <phrase
revisionflag="changed"><trademark
class="registered">Power</trademark></phrase> processors begins
The history of vector programming on Power processors begins
with the AIM (Apple, IBM, Motorola) alliance in the 1990s. The
AIM partners developed the Power Vector Media Extension (VMX) to
accelerate multimedia applications, particularly image
processing. VMX is the name still used by IBM for this
instruction set. Freescale (formerly Motorola) used the
trademark <phrase revisionflag="changed"><trademark
class="trade">AltiVec</trademark>,</phrase> while Apple at one
time called it "Velocity
trademark "AltiVec," while Apple at one time called it "Velocity
Engine." While VMX remains the most official name, the term
AltiVec is still in common use today. Freescale's AltiVec
Technology Programming Interface Manual (the "AltiVec PIM") is
@ -72,14 +68,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
also included AltiVec support, and was used in the Apple
PowerMac G5. IBM initially omitted support for VMX from its
server-class computers, but added support for it in the POWER6
<phrase revisionflag="added">processor-based</phrase> server
family.
server family.
</para>
<para>
IBM extended VMX by introducing the Vector-Scalar Extension
(VSX) for the <phrase revisionflag="changed"><trademark
class="registered">POWER7</trademark></phrase> family of
processors. VSX adds sixty-four
(VSX) for the POWER7 family of processors. VSX adds sixty-four
128-bit vector-scalar registers (VSRs); however, to optimize the amount
of per-process register state, the registers overlap with the
VRs and the scalar floating-point registers (FPRs) (see <xref
@ -87,18 +80,13 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
the data types representable by the VRs, and can also be treated
as containing two 64-bit integers or two 64-bit double-precision
floating-point values. However, ISA support for two 64-bit
integers in VSRs was limited until Version 2.07 (<phrase
revisionflag="changed"><trademark
class="registered">POWER8</trademark></phrase>) of the
integers in VSRs was limited until Version 2.07 (POWER8) of the
Power ISA, and only the VRs are supported for these
instructions.
</para>
<para>
Both the VMX and VSX instruction sets have been expanded for the
<phrase revisionflag="changed">POWER8, <trademark
class="registered">POWER9</trademark>, and <trademark
class="registered">Power10</trademark></phrase> processor
families. Starting with POWER8,
POWER8 and POWER9 processor families. Starting with POWER8,
a VSR can now contain a single 128-bit integer; and starting
with POWER9, a VSR can contain a single 128-bit IEEE floating-point
value. Again, the ISA currently only supports 128-bit
@ -115,10 +103,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
The Power architecture has supported operation in either
big-endian (BE) or little-endian (LE) mode from the
beginning. However, IBM's Power servers were only shipped
with big-endian operating systems (<phrase
revisionflag="changed"><trademark
class="registered">AIX</trademark>, IBM i, <trademark
class="registered">Linux</trademark></phrase>) prior to
with big-endian operating systems (AIX, Linux, i5/OS) prior to
the introduction of POWER8. With POWER8, IBM began
supporting little-endian Linux distributions for the first
time, and introduced a new application binary interface (the
@ -150,9 +135,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
<section xml:id="VIPR.intro.unified">
<title>The Unified Vector Register Set</title>
<para>
In <phrase revisionflag="changed"><trademark
class="trade">OpenPOWER</trademark>-compliant</phrase>
processors, floating-point and vector
In OpenPOWER-compliant processors, floating-point and vector
operations are implemented using a unified vector-scalar model.
As shown in <xref linkend="FPR-VSR" /> and <xref
linkend="VR-VSR" />, there are 64 vector-scalar registers; each
@ -218,15 +201,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
</listitem>
<listitem>
<para>
<emphasis role="underline">The XL <phrase
revisionflag="added">and Open XL</phrase>
compilers</emphasis>. For XL <phrase
revisionflag="added">and Open XL</phrase> compilers provided
with the Linux Community Edition, you can provide feedback
to the XL compiler team via email
<emphasis role="underline">The XL compilers</emphasis>. For
XL compilers provided with the Linux Community Edition, you
can provide feedback to the XL compiler team via email
(<email>compinfo@cn.ibm.com</email>); for other editions of
XL <phrase revisionflag="added">and Open XL</phrase>
compilers, please open a <link
XL compilers, please open a <link
xlink:href="https://www.ibm.com/mysupport/s/">Case</link>.
</para>
</listitem>
@ -281,9 +260,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
<link xlink:href="https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0">https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0
</link>
</emphasis>
<phrase revisionflag="added">
Need to update this to Version 3.1B, which is not yet published.
</phrase>
</para>
</listitem>
<listitem>
@ -306,17 +282,6 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
</emphasis>
</para>
</listitem>
<listitem revisionflag="added">
<para>
<emphasis>Power10 Processor User's Manual.</emphasis>
<emphasis>
<link
xlink:href="https://ibm.ent.box.com/s/tmklq90ze7aj8f4n32er1mu3sy9u8k3k">Not
yet available, link is to P9 user's manual
</link>
</emphasis>
</para>
</listitem>
<listitem>
<para>
<emphasis>Power Vector Library.</emphasis>
@ -356,37 +321,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
</emphasis>
</para>
</listitem>
<listitem revisionflag="added">
<para>
<emphasis>The GNU C Library Project.</emphasis>
<emphasis>
<link xlink:href="https://www.gnu.org/software/libc">https://www.gnu.org/software/libc</link>
</emphasis>
</para>
</listitem>
<listitem revisionflag="added">
<para>
<emphasis>Matrix-Multiply Assist Best Practices Guide.</emphasis>
<emphasis>
<link xlink:href="http://www.redbooks.ibm.com/redpapers/pdfs/redp5612.pdf">https://www.redbooks.ibm.com/redpapers/pdfs/redp5612.pdf</link>
</emphasis>
</para>
</listitem>
</itemizedlist>
</section>

<section xml:id="VIPR.intro.marks" revisionflag="added">
<title>Trademarks</title>
<para>
AIX, POWER7, POWER8, POWER9, and Power10 are trademarks or
registered trademarks of International Business Machines
Corporation. Linux is a registered trademark of Linus
Torvalds. Intel is a registered trademark of Intel Corporation
or its subsidiaries. AltiVec is a trademark of Freescale
Semiconductor, Inc.
</para>
</section>

<section xml:id="VIPR.intro.conf">
<title>Conformance to this Specification</title>
<orderedlist>

File diff suppressed because it is too large Load Diff

@ -113,10 +113,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
references. (<code>restrict</code> can be used only in C
when compiling for the C99 standard or later.
<code>__restrict__</code> is a language extension, available
in GCC, Clang, and the XL <phrase revisionflag="added">and
Open XL</phrase> compilers, that can be used without
restriction for both C and C++. See your compiler's user
manual for details.)
in GCC, Clang, and the XL compilers, that can be used
without restriction for both C and C++. See your compiler's
user manual for details.)
</para>
<para>
Suppose you have a function that takes two pointer
@ -143,9 +142,8 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
</para>
<para>
This reference provides intrinsics that are guaranteed to be
portable across compliant compilers. In particular, the <phrase
revisionflag="changed">GCC, Clang, and Open XL</phrase>
compilers for Power implement the intrinsics in
portable across compliant compilers. In particular, both the
GCC and Clang compilers for Power implement the intrinsics in
this manual. The compilers may each implement many more
intrinsics, but the ones in this manual are the only ones
guaranteed to be portable. So if you are using an interface not
@ -206,15 +204,10 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
responsible for following the calling conventions established by
the ABI (see <xref linkend="VIPR.intro.links" />). Again, it is
best to look at examples. One place to find well-written
<code>.S</code> files is in the <phrase
revisionflag="changed">GNU C Library project (see <xref
linkend="VIPR.intro.links" />).</phrase> You can also
<code>.S</code> files is in the GLIBC project. You can also
study the assembly output from your favorite compiler, which can
be obtained with the <code>-S</code> or similar option, or by
using the <emphasis role="bold">objdump</emphasis> utility:
</para>
<para revisionflag="added">
<programlisting> objdump -dr &lt;binary or object file&gt;</programlisting>
using the <emphasis role="bold">objdump</emphasis> utility.
</para>
</section>

@ -226,12 +219,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
<section>
<title>x86 Vector Portability Headers</title>
<para>
Recent versions of the <phrase revisionflag="changed">GCC,
Clang, and Open XL</phrase> compilers
Recent versions of the GCC and Clang open-source compilers
for Power provide "drop-in" portability headers for portions
of the <phrase revisionflag="changed"><trademark
class="registered">Intel</trademark></phrase> Architecture
Instruction Set Extensions (see <xref
of the Intel Architecture Instruction Set Extensions (see <xref
linkend="VIPR.intro.links" />). These headers mirror the APIs
of Intel headers having the same names. As of this writing,
support is provided for the MMX and SSE layers, up through
@ -253,18 +243,14 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
<para>
Access to the portability APIs occurs automatically when
including one of the corresponding Intel header files, such as
<code>&lt;mmintrin.h&gt;</code>. <phrase
revisionflag="added">To enable the portability headers, you
must compile with
<code>-DNO_WARN_X86_INTRINSICS</code>.</phrase>
<code>&lt;mmintrin.h&gt;</code>.
</para>
</section>
<section xml:id="VIPR.techniques.pveclib">
<title>The Power Vector Library (pveclib)</title>
<para>The Power Vector Library, also known as
<code>pveclib</code>, is a separate project available from
<phrase revisionflag="changed">GitHub</phrase> (see <xref
linkend="VIPR.intro.links" />). The
github (see <xref linkend="VIPR.intro.links" />). The
<code>pveclib</code> project builds on top of the intrinsics
described in this manual to provide higher-level vector
interfaces that are highly portable. The goals of the project

File diff suppressed because it is too large Load Diff

@ -92,9 +92,9 @@ work group and should not be shared with
other Foundation members or the public

The appropriate starting security for a new document is "workgroupConfidential". -->
<security>workgroupConfidential</security>
<!-- security>workgroupConfidential</security -->
<!-- security>foundationConfidential</security -->
<!-- security>public</security -->
<security>public</security>

<!-- TODO: Set the appropriate work flow status for the document. For documents
which are not "published" this will affect the document title page
@ -109,9 +109,9 @@ not yet been reviewed
review = this document is presently being reviewed

The appropriate starting security for a new document is "draft". -->
<documentStatus>draft</documentStatus>
<!-- documentStatus>review</documentStatus -->
<!-- documentStatus>published</documentStatus -->
<!-- documentStatus>draft</documentStatus -->
<documentStatus>review</documentStatus>
<!-- documentStatus>publish</documentStatus -->
</configuration>
</execution>
</executions>

@ -37,7 +37,8 @@ This can be accomplished with the following steps:
The project which controls the look and feel of the document is the
[Docs-Maven-Plugin project](https://github.com/OpenPOWERFoundation/Docs-Maven-Plugin), an
OpenPOWER Foundation private project on GitHub. To obtain access to the Maven Plugin project,
contact TSC Chair of the OpenPOWER Foundation \([tsc-chair@openpowerfoundation.org](mailto://tsc-chair@openpowerfoundation.org)\) or
contact Jeff Scheel \([scheel@us.ibm.com](mailto://scheel@us.ibm.com)\) or
Jeff Brown \([jeffdb@us.ibm.com](mailto://jeffdb@us.ibm.com)\).

## License
This project is licensed under the Apache V2 license. More information

@ -19,6 +19,5 @@
enable all document builds from the top level -->
<module>Porting_Vector_Intrinsics</module>
<module>Intrinsics_Reference</module>
<module>pvipr-errata-1.0</module>
</modules>
</project>

@ -1,110 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
Copyright (c) 2021 OpenPOWER Foundation

Licensed under the GNU Free Documentation License, Version 1.3;
with no Invariants Sections, with no Front-Cover Texts,
and with no Back-Cover Texts (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.gnu.org/licenses/fdl-1.3.txt

-->

<!-- The following entity variable is used to reflect the version of the
template document master used for building a document. This value
should be set by copy of the of template used to create a new
document and should not be changed. Use of this value is in
in the Abstract section in this file. -->
<!DOCTYPE book [
<!ENTITY template_version "1.1.0">
]>

<book xmlns="http://docbook.org/ns/docbook"
xmlns:xi="http://www.w3.org/2001/XInclude"
xmlns:xlink="http://www.w3.org/1999/xlink"
version="5.0"
xml:id="bk_main">

<title>OpenPOWER PVIPR Errata</title>
<subtitle>For POWER Intrinsics Reference v1.5</subtitle>

<info>
<author>
<personname>
System Software Work Group
</personname>
<email>syssw-chair@openpowerfoundation.org</email>
<affiliation>
<orgname>OpenPower Foundation</orgname>
</affiliation>
</author>
<copyright>
<year>2021</year>
<holder>OpenPOWER Foundation</holder>
</copyright>
<releaseinfo>Revision 1.0</releaseinfo>
<productname>OpenPOWER</productname>
<pubdate/>

<!-- TODO: Select one of the two following legalnotice role= values:
"apache2" for an Apache V2 license or
"opfExternal" for an official OpenPOWER Foundation external license text.
If you don't know which one to select, change to "opfExternal" and ask your TSC representative. -->
<!-- legalnotice role="apache2" -->
<!-- legalnotice role="opfExternal" -->
<!-- Following matches the ABI itself -->
<legalnotice role="gnuFreeDoc">

<annotation>
<remark>Copyright details are filled in by the template.</remark>
</annotation>
</legalnotice>

<!-- TODO: Update the following text with the correct document description (first paragraph),
Work Group name, and Work Product track (both in second paragraph). -->
<abstract>
<para>This document provides errata against version 1.0 of the
POWER Vector Intrinsics Programming Reference Specification. These
errata should be considered part of said specification until such
time as a newer version of the full specification is published.</para>
<para>This document is a Non-standard Track, Work Group Note work
product owned by the System Software Workgroup and handled in compliance
with the requirements outlined in the <citetitle>OpenPOWER Foundation
Work Group (WG) Process</citetitle> document. It was created using the
<citetitle>Document Development Guide</citetitle> version
&template_version;. Comments, questions, etc. can be submitted to the
public mailing list for the parent specification at
<email>syssw-programming-guides@mailinglist.openpowerfoundation.org</email>.</para>
</abstract>

<revhistory>
<!-- TODO: Set the initial version information and clear any old information out -->
<revision>
<date>2021-06-09</date>
<revdescription>
<itemizedlist spacing="compact">
<listitem>
<para>Revision 1.0</para>
</listitem>
</itemizedlist>
</revdescription>
</revision>
</revhistory>
</info>

<!-- The ch_preface.xml file is required by all documents -->
<xi:include href="../../Docs-Master/common/ch_preface.xml"/>

<!-- TODO: Add your chapter heading files here. Remove both files and insert your own. -->
<!-- See the template document for naming conventions and location of files. -->
<xi:include href="ch_errata.xml"/>

<!-- The app_foundation.xml appendix file is required by all documents. -->
<xi:include href="../../Docs-Master/common/app_foundation.xml"/>

<!-- TODO: The following template document may be modified to create additional appendices as needed. -->
<!-- xi:include href="app_template.xml"/ -->

</book>

@ -1,110 +0,0 @@
<!--
Copyright (c) 2021 OpenPOWER Foundation

Licensed under the GNU Free Documentation License, Version 1.3;
with no Invariants Sections, with no Front-Cover Texts,
and with no Back-Cover Texts (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.gnu.org/licenses/fdl-1.3.txt

-->
<chapter xmlns="http://docbook.org/ns/docbook"
xmlns:xl="http://www.w3.org/1999/xlink" version="5.0" xml:lang="en"
xml:id="dbdoclet.50655240_pgfId-1156194">

<title>Errata</title>
<para>The following sections of version 1.0 of the POWER Vector Intrinsics
Programming Reference are modified as specified.</para>
<section>
<title>Section 4.2, Built-In Vector Functions</title>
<para>
<emphasis role="underline">Problem</emphasis>: For intrinsics that
represent vector load and store operations, the arguments that
represent offsets from a pointer are listed as having type "signed
long long." Although this is correct for 64-bit code, and this is
a 64-bit specification, it is recognized that this is not
compatible with existing 32-bit implementations. This can be
resolved using the type "signed long" instead, which is 64 bits on
a 64-bit system and 32 bits on a 32-bit system.
</para>
<para>
<emphasis role="underline">Resolution</emphasis>: The following
changes are incorporated for each of the specified built-in
functions.
<itemizedlist>
<listitem>
<para>
<emphasis role="bold">vec_ld</emphasis>: All types in column
<emphasis role="bold">a</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_lde</emphasis>: All types in column
<emphasis role="bold">a</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_ldl</emphasis>: All types in column
<emphasis role="bold">a</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_st</emphasis>: All types in column
<emphasis role="bold">b</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_ste</emphasis>: All types in column
<emphasis role="bold">b</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_stl</emphasis>: All types in column
<emphasis role="bold">b</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_xl</emphasis>: All types in column
<emphasis role="bold">a</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_xl_be</emphasis>: All types in column
<emphasis role="bold">a</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_xst</emphasis>: All types in column
<emphasis role="bold">b</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
<listitem>
<para>
<emphasis role="bold">vec_xst_be</emphasis>: All types in column
<emphasis role="bold">b</emphasis> are changed to <emphasis
role="bold">signed long</emphasis>.
</para>
</listitem>
</itemizedlist>
</para>
</section>
</chapter>

@ -1,155 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
Copyright (c) 2021 OpenPOWER Foundation

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.

-->
<project xmlns="http://maven.apache.org/POM/4.0.0"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 http://maven.apache.org/maven-v4_0_0.xsd">
<parent>

<groupId>org.openpowerfoundation.docs</groupId>
<artifactId>workgroup-pom</artifactId>
<version>1.0.0-SNAPSHOT</version>
<relativePath>../pom.xml</relativePath>
</parent>
<modelVersion>4.0.0</modelVersion>

<artifactId>pvipr-1_0-errata</artifactId>

<packaging>jar</packaging>

<name>POWER Vector Intrinsics Programming Reference 1.0 Errata</name>

<properties>
<!-- This is set by Jenkins according to the branch. -->
<release.path.name></release.path.name>
<comments.enabled>0</comments.enabled>
</properties>
<!-- ################################################ -->
<!-- USE "mvn clean generate-sources" to run this POM -->
<!-- ################################################ -->
<build>
<plugins>
<plugin>

<groupId>org.openpowerfoundation.docs</groupId>

<artifactId>openpowerdocs-maven-plugin</artifactId>
<!-- version set in ../pom.xml -->
<executions>
<execution>
<id>generate-webhelp</id>
<goals>
<goal>generate-webhelp</goal>
</goals>
<phase>generate-sources</phase>
<configuration>
<!-- These parameters only apply to webhelp -->
<enableDisqus>${comments.enabled}</enableDisqus>
<disqusShortname>openpower-template-guide</disqusShortname>
<enableGoogleAnalytics>1</enableGoogleAnalytics>
<googleAnalyticsId>UA-17511903-1</googleAnalyticsId>
<generateToc>
appendix toc,title
article/appendix nop
article toc,title
book toc,title,figure,table,example,equation
book/appendix nop
book/chapter nop
chapter toc,title
chapter/section nop
section toc
part toc,title
reference toc,title
set toc,title
</generateToc>
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<sectionAutolabel>1</sectionAutolabel>
<tocSectionDepth>3</tocSectionDepth>
<sectionLabelIncludesComponentLabel>1</sectionLabelIncludesComponentLabel>

<webhelpDirname>pvipr-1_0-errata</webhelpDirname>

<pdfFilenameBase>pvipr-1_0-errata</pdfFilenameBase>

<!-- TODO: Define the appropriate work product type. These values are defined by the IPR Policy.
Consult with the Work Group Chair or a Technical Steering Committee member if you have
questions about which value to select.

If no value is provided below, the document will default to "Work Group Notes".-->
<workProduct>workgroupNotes</workProduct>
<!-- workProduct>workgroupSpecification</workProduct -->
<!-- workProduct>candidateStandard</workProduct -->
<!-- workProduct>openpowerStandard</workProduct -->

<!-- TODO: Set the appropriate security policy for the document. For documents
which are not "public" this will affect the document title page and
create a vertical running ribbon on the internal margin of the
security status in all CAPS. Values and definitions are formally
defined by the IPR policy. A layman's definition follows:

public = this document may be shared outside the
foundation and thus this setting must be
used only when completely sure it allowed
foundationConfidential = this document may be shared freely with
OpenPOWER Foundation members but may not be
shared publicly
workgroupConfidential = this document may only be shared within the
work group and should not be shared with
other Foundation members or the public

The appropriate starting security for a new document is "workgroupConfidential". -->
<!-- security>workgroupConfidential</security -->
<!-- security>foundationConfidential</security -->
<security>public</security>

<!-- TODO: Set the appropriate work flow status for the document. For documents
which are not "published" this will affect the document title page
and create a vertical running ribbon on the internal margin of the
security status in all CAPS. Values and definitions are formally
defined by the IPR policy. A layman's definition follows:

published = this document has completed all reviews and has
been published
draft = this document is actively being updated and has
not yet been reviewed
review = this document is presently being reviewed

The appropriate starting security for a new document is "draft". -->
<!-- documentStatus>draft</documentStatus -->
<!-- documentStatus>review</documentStatus -->
<documentStatus>published</documentStatus>
</configuration>
</execution>
</executions>
<configuration>
<!-- These parameters apply to pdf and webhelp -->
<xincludeSupported>true</xincludeSupported>
<sourceDirectory>.</sourceDirectory>
<includes>
bk_main.xml
</includes>

<!-- **TODO: Set to the correct project URL. This likely needs input from the TSC. -->
<!-- canonicalUrlBase>http://openpowerfoundation.org/docs/template-guide/content</canonicalUrlBase -->
<glossaryCollection>${basedir}/../glossary/glossary-terms.xml</glossaryCollection>
<includeCoverLogo>1</includeCoverLogo>
<coverUrl>www.openpowerfoundation.org</coverUrl>
</configuration>
</plugin>
</plugins>
</build>
</project>
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