# completes OK and build/cmod7_kintex/software is created
```
#### 32BE
```
a2o_32.py --csr-csv csr.csv
Running test binary command: /data/projects/a2o/dev/build/litex/build/cmod7_kintex/software/libc/meson-private/sanitycheckc.exe
C compiler for the build machine: ccache cc (gcc 9.4.0 "cc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0")
C linker for the build machine: cc ld.bfd 2.34
Build machine cpu family: x86_64
Build machine cpu: x86_64
Host machine cpu family: ppc
Host machine cpu: a2o
Target machine cpu family: ppc
Target machine cpu: a2o
../../../../../../../../../../home/wtf/.local/lib/python3.8/site-packages/pythondata_software_picolibc/data/meson.build:99:2: ERROR: Problem encountered:
Unsupported architecture: "ppc"
```
* change core.py cpu_family="powerpc"; warning only :)
```
a2o_32.py --csr-csv csr.csv
...
WARNING: Unknown CPU family powerpc, please report this at https://github.com/mesonbuild/meson/issues/new
...
[15/795] Compiling C object newlib/libc.a.p/libc_machine_powerpc_setjmp.S.o
* get rid of forced error in data/newlib/libc/machine/powerpc/setjmp.S
```
cd pythondata-software-picolibc$
# //#error 32-bit
pip3 install .
```
```
a2o_32.py --csr-csv csr.csv
../../../../../../../../../../home/wtf/.local/lib/python3.8/site-packages/pythondata_software_picolibc/data/newlib/libc/include/machine/endian.h:74:30: error: expected statement before ‘)’ token
74 | #define ntohl(_x) __ntohl(_x))
| ^
../../../../../../../../../../home/wtf/.local/lib/python3.8/site-packages/pythondata_software_picolibc/data/newlib/libc/xdr/xdr_rec.c:827:12: note: in expansion of macro ‘ntohl’
827 | header = ntohl (header);
| ^~~~~
[438/795] Compiling C object newlib/libc.a.p/libc_time_strftime.c.o
ninja: build stopped: subcommand failed.
```
* fix syntax in data/newlib/libc/include/machine/endian.h
00001256 C0: CP 0:0001C0 00000000000001C0 1F44 is stw (lr) at orig stack + 4 - did it cross 64k? yeah 1F44/20004
00001262 C0: CP 0:0001C0 00000000000001C0
00001267 C0: CP 0:0001C0 00000000000001C0
00001272 C0: CP 0:0001C0 00000000000001C0
00001277 C0: CP 0:0001C0 00000000000001C0
00001280 C0: CP 0:0001C0 00000000000001C0
00001294 C0: CP 0:0001C0 00000000000001C0
00001308 C0: CP 0:0001C0 00000000000001C0
00001322 C0: CP 0:0001C0 00000000000001C0
00001336 C0: CP 0:0001C0 00000000000001C0
00001350 C0: CP 0:0001C0 00000000000001C0
*** Loop detected for 10 iterations ***
Quiescing...
00001366 C0: CP 0:0001C0 00000000000001C0
00001369 C0: CP 0:0001C0 00000000000001C0
tb_litex_soc
Cycles run=1376
You are worthless and weak.
```
* set top o stack to _fstack-8; now makes it through 4DF8 (in uart_init)...doh, need to add the derat entry for csr (memory_region,csr,0xfff00000,65536,io)
* added parm to cmod7 platform to allow replacing the target fpga device; trying arty-200 to see if it fits as-is - no, but can override?
```
ERROR: [DRC UTLZ-1] Resource utilization: Slice LUTs over-utilized in Top Level Design (This design requires more Slice LUTs cells than are available in the target device. This design requires 212846 of such cell types but only 134600 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.)
```
* try adding ```set drc.disableLUTOverUtilError 1``` to build script and running...
