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cleanup

master
openpowerwtf 4 months ago
parent
commit
737d0ddafb
  1. 2
      dev/verilog/trilib/tri_st_mult_core.v
  2. 1
      dev/verilog/work/pcq_local_fir2.v
  3. 1
      dev/verilog/work/pcq_regs_fir.v

2
dev/verilog/trilib/tri_st_mult_core.v

@ -102,7 +102,7 @@ module tri_st_mult_core( @@ -102,7 +102,7 @@ module tri_st_mult_core(
//wire [0:`NCLK_WIDTH-1] ex4_lclk;
//wire [0:`NCLK_WIDTH-1] ex5_lclk;
wire ex4_lclk;
wire ex6_lclk;
wire ex5_lclk;

wire [198:240] ex4_pp2_0c_din;
wire [198:240] ex4_pp2_0c;

1
dev/verilog/work/pcq_local_fir2.v

@ -134,6 +134,7 @@ module pcq_local_fir2( @@ -134,6 +134,7 @@ module pcq_local_fir2(
wire func_d1clk;
wire func_d2clk;
//wire [0:`NCLK_WIDTH-1] func_lclk;
wire func_lclk;
wire mode_d1clk;
wire mode_d2clk;
//wire [0:`NCLK_WIDTH-1] mode_lclk;

1
dev/verilog/work/pcq_regs_fir.v

@ -219,6 +219,7 @@ module pcq_regs_fir( @@ -219,6 +219,7 @@ module pcq_regs_fir(
wire func_d1clk;
wire func_d2clk;
//wire [0:`NCLK_WIDTH-1] func_lclk;
wire func_lclk;
wire func_thold_b;
wire func_force;
// SCOM

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