random tst, bios

dev/src/test3/arcitst.lst

@@ -327,9 +327,9 @@
  159 022c 8063000C 	   lwz         r3,(init_r3-tst_inits)(r3)
  160              	
  161              	jmp2tst:
- 162              	   #rfi
+ 162 0230 4C000064 	   rfi
  163              	   #rfid
- 164 0230 48010002 	   ba 0x10000
+ 164              	   #ba 0x10000
  165              	
  166              	tst_end:
  167 0234 4800000C 	   b           save_results
@@ -394,7 +394,7 @@
  225 0304 3C600867 	   lis         r3,MAGIC@h
  226 0308 60635309 	   ori         r3,r3,MAGIC@l
  227              	
- 228 030c 48000000 	   b           tst_done
+ 228 030c 48000003 	   bla         tst_done
  229              	
  230              	# -------------------------------------------------------------------------------------------------
  231 0310 60000000 	.align 5

dev/src/test3/arcitst.s

@@ -159,9 +159,9 @@ init_regs:
    lwz         r3,(init_r3-tst_inits)(r3)
 
 jmp2tst:
-   #rfi
+   rfi
    #rfid
-   ba 0x10000
+   #ba 0x10000
 
 tst_end:
    b           save_results
@@ -225,7 +225,7 @@ tst_cleanup:
    lis         r3,MAGIC@h
    ori         r3,r3,MAGIC@l
 
-   b           tst_done
+   bla         tst_done
 
 # -------------------------------------------------------------------------------------------------
 .align 5

dev/src/test3/bios.c

@@ -1,22 +1,57 @@
 #include <stdint.h>
+#include <stdio.h>
 
 #include "bios.h"
 
-// arci stuff1
+#ifdef PRINTF
+#include "liblitex.h"
+
+//static char printbuf[1000]; // make this a pointer with address a define
+//const char* printbuf = (char *)0x12000;
+#ifndef PRINTBUF
+#define PRINTBUF 0x0001C000
+#endif
+//static int printbuf_ptr = 0;
+static char *printbuf_ptr = (char *)PRINTBUF;
+void putchar_handler(char c) {
+   //printbuf[printbuf_ptr++] = c;
+   //*(printbuf + printbuf_ptr++) = c;
+   *printbuf_ptr++ = c;
+}
+#endif
+
+// arci stuff
+//void tst_done(unsigned int rc);
 void tst_done(unsigned int rc);
-unsigned int checkResult(unsigned int r, char* name);
-// shouldn't need any of these if i use the .o from bios build???
-//#include "generated/soc.h"
+
+// in kernel (for constant locs)
+extern void tst_pass(void);
+extern void tst_fail(int i);
+/*
+void tst_pass(void);
+void tst_fail(int i);
+
+void tst_fail(int i) {
+   while(1) {}
+}
+
+void tst_pass(void) {
+   while(1) {}
+}
+*/
+
+//inline unsigned int checkResult(unsigned int r) __attribute__((always_inline));
+unsigned int checkResult(unsigned int r);
+
 extern unsigned int tst_start;
 extern unsigned int tst_end;
 extern unsigned int tst_inits;
 extern unsigned int tst_results;
 extern unsigned int tst_expects;
 
-
 int main(int tid) {
    int *p;
-   int *fdata = _fdata;
+   int *fdata = &_fdata;
    unsigned int *inits = &tst_inits;
 
    if (tid != 0) {
@@ -26,14 +61,23 @@ int main(int tid) {
    // r/w memory init
 
    // copy
-   for (p = _fdata_rom; p < _edata_rom; p++){
+   for (p = &_fdata_rom; p < &_edata_rom; p++){
       *(fdata++) = *p;
    }
    // zero
-   for (p = _fbss; p < _ebss; p++) {
-      *_fbss = 0;
+   for (p = &_fbss; p < &_ebss; p++) {
+      *(p++) = 0;
    }
 
+#ifdef PRINTF
+   console_set_write_hook(putchar_handler);
+   putchar('w');
+   putchar('t');
+   putchar('f');
+   putchar('\n');
+   printf("main(%i)\n", tid);
+#endif
+
    // core init
    set_epcr(0x03000000);                        // icm=gicm=1
    set_dec(0);
@@ -63,50 +107,58 @@ int main(int tid) {
    );
 
    while(1) {}
-
    return 0;
 }
 
 #define MAGIC 0x08675309
 
-//void  __attribute__((noreturn)) tst_done(unsigned int rc) {
+// r1 has been restored to where it was for 'b init_tst' above
 void tst_done(unsigned int rc) {
-   unsigned int i, ok = 1, done = 0;
-   /*
-   char c;
-   char name[10];
-   unsigned int r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15;
-   unsigned int cr, xer, ctr, lr, tar;
-   unsigned int op, *cia;
-   */
+   unsigned int i, ok = 1;
+   unsigned int act, exp;
 
    if (rc != MAGIC) {
-      ok = 0;
+      tst_fail(0x80000000);
    }
 
-   // ops
-
-   // cr, xer, ctr, lr, tar
-   ok = ok && checkResult(32, "CR");
-   ok = ok && checkResult(33, "XER");
-   ok = ok && checkResult(34, "CTR");
-   ok = ok && checkResult(35, "LR");
-   ok = ok && checkResult(36, "TAR");
-}
-
-unsigned int checkResult(unsigned int r, char* name) {
-   unsigned int init, act, exp, ok = 1;
+   // check GPR & CR
+   for (i = 0; i < 32; i++) {
+      act = *(&tst_results + i);
+      exp = *(&tst_expects + i);
+      ok = ok && (act == exp);
+      if (!ok) {
+         tst_fail(i);
+      }
+   }
 
-   init = *(&tst_inits + r);
-   act = *(&tst_results + r);
-   exp = *(&tst_expects + r);
+   // check XER - a2o not compliant right now (only so/ov/ca/len)
+   i = 33;
+   act = *(&tst_results + i);
+   exp = *(&tst_expects + i) & 0xE000007F;
+   ok = ok && (act == exp);
+   if (!ok) {
+      tst_fail(i);
+   }
 
-   ok = act != exp;
+   // check CLT - skip tar, a2o doesn't have usermode sprg to use for save reg, so using tar
+   //for (i = 34; i < 37; i++) {
+   for (i = 34; i < 36; i++) {
+      act = *(&tst_results + i);
+      exp = *(&tst_expects + i);
+      ok = ok && (act == exp);
+      if (!ok) {
+         tst_fail(i);
+      }
+   }
 
-   return ok;
+   // could get back to kernel
+   tst_pass();
+   while (1) {}
 }
 
-// these are branched to!
+// these are branched to!  but if fun, they assume r1 is stack!!!!
+
+// tst is ended with sc to return to priv mode; then save results
 void int_sc(int code, int srr0) {
    asm (
       "b    tst_end\n"
@@ -118,4 +170,5 @@ void int_sc(int code, int srr0) {
 
 void int_unhandled(void) {
    while(1) {}
-}
+}
+

dev/src/test3/bios.h

@@ -1,12 +1,16 @@
-#ifndef BIOS_H
+#ifndef _BIOS_H_
+#define _BIOS_H_
 
-#define BIOS_H
+// need address for linker constants!
+extern int _fdata_rom;
+extern int _edata_rom;
+extern int _fdata;
+extern int _fbss;
+extern int _ebss;
+
+// printf to mem
+void putchar_handler(char c);
 
-extern int *_fdata_rom;
-extern int *_edata_rom;
-extern int *_fdata;
-extern int *_fbss;
-extern int *_ebss;
 
 void int_sc(int code, int srr0);
 void int_unhandled(void);

dev/src/test3/boot.s

@@ -39,7 +39,8 @@
 .set BIOS_MSR,0x8002B000
 .endif
 
- # erat w2 (test)   # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
+#wtf this should to be done in bios based on the tst
+# erat w2 (test)   # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw=60:61 ur/sr=62:63
 .ifdef BIOS_LE
 .set BIOS_ERATW2,0x000000BF
 .else
@@ -55,6 +56,7 @@
 .set BIOS_STACK_1,_stack_1
 .endif
 
+#wtf get rid of this and just make the low 1G a single erat entry - it can be fixed up by bios later
 .ifndef BIOS_START
 .set BIOS_START,0x00010000
 .endif
@@ -69,7 +71,8 @@ int_000:
       b         boot_start
 
 .ifdef TST_END
-      b         tst_end
+# tst ends with ba here, which switches to priv and jumps to tst_end
+      sc
 .endif
 
 # critical input
@@ -119,6 +122,10 @@ int_100:
 # sc
 .org 0x120
 int_120:
+.ifdef TST_END
+# tst results haven't been saved yet; if want to call bios, need to save r1, then restore or set stack
+      b         tst_end
+.else
 .ifdef INT_SC
       # lev is in 20:26, but supposed to use scv now
       li        r3,0
@@ -131,6 +138,7 @@ int_120:
       b         .
 .endif
 .endif
+.endif
 
 # apu unavailable
 .org 0x140
@@ -336,6 +344,19 @@ boot_complete:
 
 # ------------------------------------------------------------------------------------------------------------------------------
 
+.ifdef TST_PASSFAIL
+.global tst_pass
+.global tst_fail
+
+.org 0x7F0
+tst_pass:
+      b         .
+
+.org 0x7F4
+tst_fail:
+      b         .
+.endif
+
 .org 0x7FC
 kernel_return:
       b         .

dev/src/test3/build

@@ -3,6 +3,12 @@
 export COMMONFLAGS="-ffreestanding -fomit-frame-pointer -Wall -fno-stack-protector"
 export CFLAGS="$COMMONFLAGS -fexceptions -Wstrict-prototypes -Wold-style-definition -Wmissing-prototypes"
 
+#LITEXLIB=
+#PRINTF=
+LITEXLIB="libc.o vsnprintf.o console.o"
+# getting dtlb in vsnprintf
+PRINTF="-DPRINTF"
+
 # defines
 
 ## define vars to init rom with csr's it uses...
@@ -43,7 +49,7 @@ echo -n "Compiling..."
 
 echo -n "boot.s "
 #powerpc-linux-gnu-as -mbig-endian -ma2 -defsym INT_SC=1 -defsym INT_UNHANDLED=1 -I. boot.s -ahlnd -o crt0.o > crt0.lst
-powerpc-linux-gnu-as -mbig-endian -ma2 -defsym TST_END=1 -defsym INT_UNHANDLED=1 -I. boot.s -ahlnd -o crt0.o > crt0.lst
+powerpc-linux-gnu-as -mbig-endian -ma2 -defsym TST_END=1 -defsym INT_UNHANDLED=1 -defsym TST_PASSFAIL=1 -I. boot.s -ahlnd -o crt0.o > crt0.lst
 
 if [ $? -ne 0 ]; then
    exit
@@ -58,11 +64,14 @@ fi
 
 echo ""
 echo -n "bios.c "
-powerpc-linux-gnu-gcc -c -I. $CFLAGS bios.c
+powerpc-linux-gnu-gcc $PRINTF -c -I. $CFLAGS bios.c
+if [ $? -ne 0 ]; then
+   exit
+fi
 
 echo ""
 echo "Linking..."
-powerpc-linux-gnu-ld -nostdlib -nodefaultlibs -T linker.ld crt0.o bios.o arcitst.o -o rom
+powerpc-linux-gnu-ld -nostdlib -nodefaultlibs -T linker.ld crt0.o bios.o arcitst.o $LITEXLIB -o rom
 if [ $? -ne 0 ]; then
    exit
 fi

dev/src/test3/build_litex_base

@@ -0,0 +1,43 @@
+#!/usr/bin/bash
+
+export COMMONFLAGS="-ffreestanding -fomit-frame-pointer -Wall -fno-stack-protector"
+export CFLAGS="$COMMONFLAGS -fexceptions -Wstrict-prototypes -Wold-style-definition -Wmissing-prototypes"
+
+echo -n "Compiling..."
+
+echo ""
+
+echo -n "libc.c "
+powerpc-linux-gnu-gcc -c -Ilitex/include/base -Ilitex/include/flibm $CFLAGS -DNO_FLOAT litex/libbase/libc.c
+if [ $? -ne 0 ]; then
+   exit
+fi
+
+echo -n "vsnprintf.c "
+# NO_FLOAT gets rid of
+#snprintf.c:(.text+0x800): undefined reference to `log10'
+#powerpc-linux-gnu-ld: vsnprintf.c:(.text+0x80c): undefined reference to `floor'
+#powerpc-linux-gnu-ld: vsnprintf.c:(.text+0x824): undefined reference to `pow'
+#powerpc-linux-gnu-ld: vsnprintf.c:(.text+0x898): undefined reference to `fmod'
+#powerpc-linux-gnu-ld: vsnprintf.c:(.text+0x950): undefined reference to `fmod'
+powerpc-linux-gnu-gcc -c -Ilitex/include/base -Ilitex/include/flibm $CFLAGS -DNO_FLOAT litex/libbase/vsnprintf.c
+if [ $? -ne 0 ]; then
+   exit
+fi
+
+echo -n "console.c "
+# use hacked console.c to printf to mem instead of uart - use console_set_write_hook(console_write_hook putchar_handler)) to print to buffer
+#powerpc-linux-gnu-gcc -c -Ilitex/include/base -Ilitex/include/flibm $CFLAGS litex/libbase/console.c
+powerpc-linux-gnu-gcc -nostdlib -nodefaultlibs -c -Ilitex/include/base -Ilitex/include/flibm $CFLAGS console.c
+
+if [ $? -ne 0 ]; then
+   exit
+fi
+
+echo ""
+
+#echo "Linking to test dependencies..."
+#powerpc-linux-gnu-ld -nostdlib -nodefaultlibs libc.o vsnprintf.o console.o -o litexlib.o
+#if [ $? -ne 0 ]; then
+#   exit
+#fi

dev/src/test3/console.c

@@ -0,0 +1,113 @@
+// use console_set_write_hook(func) to do putchar() to mem
+
+//#include <uart.h>
+#include <console.h>
+#include <stdio.h>
+#include <stdarg.h>
+
+//#include <generated/csr.h>
+
+FILE *stdin, *stdout, *stderr;
+
+static console_write_hook write_hook;
+static console_read_hook read_hook;
+static console_read_nonblock_hook read_nonblock_hook;
+
+void console_set_write_hook(console_write_hook h)
+{
+	write_hook = h;
+}
+
+void console_set_read_hook(console_read_hook r, console_read_nonblock_hook rn)
+{
+	read_hook = r;
+	read_nonblock_hook = rn;
+}
+
+#ifdef CSR_UART_BASE
+int putchar(int c)
+{
+	uart_write(c);
+	if(write_hook != NULL)
+		write_hook(c);
+	if (c == '\n')
+		putchar('\r');
+	return c;
+}
+
+char readchar(void)
+{
+	while(1) {
+		if(uart_read_nonblock())
+			return uart_read();
+		if((read_nonblock_hook != NULL) && read_nonblock_hook())
+			return read_hook();
+	}
+}
+
+int readchar_nonblock(void)
+{
+	return (uart_read_nonblock()
+		|| ((read_nonblock_hook != NULL) && read_nonblock_hook()));
+}
+
+#else
+
+int putchar(int c)
+{
+	if(write_hook != NULL)
+		write_hook(c);
+	return c;
+}
+
+char readchar(void)
+{
+	while(1) {
+		if((read_nonblock_hook != NULL) && read_nonblock_hook())
+			return read_hook();
+	}
+}
+
+int readchar_nonblock(void)
+{
+	return ((read_nonblock_hook != NULL) && read_nonblock_hook());
+}
+
+#endif
+
+int puts(const char *s)
+{
+	putsnonl(s);
+	putchar('\n');
+	return 1;
+}
+
+void putsnonl(const char *s)
+{
+	while(*s) {
+		putchar(*s);
+		s++;
+	}
+}
+
+#define PRINTF_BUFFER_SIZE 256
+
+int vprintf(const char *fmt, va_list args)
+{
+	int len;
+	char outbuf[PRINTF_BUFFER_SIZE];
+	len = vscnprintf(outbuf, sizeof(outbuf), fmt, args);
+	outbuf[len] = 0;
+	putsnonl(outbuf);
+	return len;
+}
+
+int printf(const char *fmt, ...)
+{
+	int len;
+	va_list args;
+	va_start(args, fmt);
+	len = vprintf(fmt, args);
+	va_end(args);
+	return len;
+}

dev/src/test3/crt0.lst

@@ -189,452 +189,473 @@
   39              	.set BIOS_MSR,0x8002B000
   40              	.endif
   41              	
-  42              	 # erat w2 (test)   # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/s
-  43              	.ifdef BIOS_LE
-  44              	.set BIOS_ERATW2,0x000000BF
-  45              	.else
-  46              	.set BIOS_ERATW2,0x0000003F
-  47              	.endif
-  48              	
-  49              	# bios might be able to use one stack during thread startup if careful
-  50              	.ifndef BIOS_STACK_0
-  51              	.set BIOS_STACK_0,_stack_0
-  52              	.endif
-  53              	
-  54              	.ifndef BIOS_STACK_1
-  55              	.set BIOS_STACK_1,_stack_1
-  56              	.endif
-  57              	
-  58              	.ifndef BIOS_START
-  59              	.set BIOS_START,0x00010000
-  60              	.endif
-  61              	
-  62              	.section .text
+  42              	#wtf this should to be done in bios based on the tst
+  43              	# erat w2 (test)   # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/sx=58:59 uw/sw
+  44              	.ifdef BIOS_LE
+  45              	.set BIOS_ERATW2,0x000000BF
+  46              	.else
+  47              	.set BIOS_ERATW2,0x0000003F
+  48              	.endif
+  49              	
+  50              	# bios might be able to use one stack during thread startup if careful
+  51              	.ifndef BIOS_STACK_0
+  52              	.set BIOS_STACK_0,_stack_0
+  53              	.endif
+  54              	
+  55              	.ifndef BIOS_STACK_1
+  56              	.set BIOS_STACK_1,_stack_1
+  57              	.endif
+  58              	
+  59              	#wtf get rid of this and just make the low 1G a single erat entry - it can be fixed up by bios late
+  60              	.ifndef BIOS_START
+  61              	.set BIOS_START,0x00010000
+  62              	.endif
   63              	
-  64              	.global _start
+  64              	.section .text
   65              	
-  66              	.org 0x000
-  67              	_start:
-  68              	int_000:
-  69 0000 48000400 	      b         boot_start
-  70              	
-  71              	.ifdef TST_END
-  72 0004 48000000 	      b         tst_end
-  73              	.endif
-  74              	
-  75              	# critical input
-  76 0008 00000000 	.org 0x020
-  76      00000000 
-  76      00000000 
-  76      00000000 
-  76      00000000 
-  77              	int_020:
-  78              	.ifdef INT_UNHANDLED
-  79 0020 48000000 	      b         int_unhandled
-  80              	.else
-  81              	      b         .
-  82              	.endif
-  83              	
-  84              	# debug
-  85 0024 00000000 	.org 0x040
-  85      00000000 
-  85      00000000 
-  85      00000000 
-  85      00000000 
-  86              	int_040:
-  87 0040 48000000 	      b         .
-  88              	
-  89              	# dsi
-  90 0044 00000000 	.org 0x060
-  90      00000000 
-  90      00000000 
-  90      00000000 
-  90      00000000 
-  91              	int_060:
-  92 0060 48000000 	      b         .
-  93              	
-  94              	# isi
-  95 0064 00000000 	.org 0x080
-  95      00000000 
-  95      00000000 
-  95      00000000 
-  95      00000000 
-  96              	int_080:
-  97 0080 48000000 	      b         .
-  98              	
-  99              	# external
- 100 0084 00000000 	.org 0x0A0
- 100      00000000 
- 100      00000000 
- 100      00000000 
- 100      00000000 
- 101              	int_0A0:
- 102 00a0 48000000 	      b         .
- 103              	
- 104              	# alignment
- 105 00a4 00000000 	.org 0x0C0
- 105      00000000 
- 105      00000000 
- 105      00000000 
- 105      00000000 
- 106              	int_0C0:
- 107 00c0 48000000 	      b         .
- 108              	
- 109              	# program
- 110 00c4 00000000 	.org 0x0E0
- 110      00000000 
- 110      00000000 
- 110      00000000 
- 110      00000000 
- 111              	int_0E0:
- 112 00e0 48000000 	      b         .
- 113              	
- 114              	# fp unavailable
- 115 00e4 00000000 	.org 0x100
- 115      00000000 
- 115      00000000 
- 115      00000000 
- 115      00000000 
- 116              	int_100:
- 117 0100 48000000 	      b         .
- 118              	
- 119              	# sc
- 120 0104 00000000 	.org 0x120
- 120      00000000 
- 120      00000000 
- 120      00000000 
- 120      00000000 
- 121              	int_120:
- 122              	.ifdef INT_SC
- 123              	      # lev is in 20:26, but supposed to use scv now
- 124              	      li        r3,0
- 125              	      mfsrr0    r4
- 126              	      b         int_sc
- 127              	.else
- 128              	.ifdef INT_UNHANDLED
- 129 0120 48000000 	      b         int_unhandled
- 130              	.else
- 131              	      b         .
- 132              	.endif
- 133              	.endif
- 134              	
- 135              	# apu unavailable
- 136 0124 00000000 	.org 0x140
- 136      00000000 
- 136      00000000 
- 136      00000000 
- 136      00000000 
- 137              	int_140:
- 138 0140 48000000 	      b         .
- 139              	
- 140              	# decrementer
- 141 0144 00000000 	.org 0x160
- 141      00000000 
- 141      00000000 
- 141      00000000 
- 141      00000000 
- 142              	int_160:
- 143 0160 48000000 	      b         .
- 144              	
- 145              	# fit
- 146 0164 00000000 	.org 0x180
- 146      00000000 
- 146      00000000 
- 146      00000000 
- 146      00000000 
- 147              	int_180:
- 148 0180 48000000 	      b         .
- 149              	
- 150              	# watchdog
- 151 0184 00000000 	.org 0x1A0
- 151      00000000 
- 151      00000000 
- 151      00000000 
- 151      00000000 
- 152              	int_1A0:
- 153 01a0 48000000 	      b         .
- 154              	
- 155              	# dtlb
- 156 01a4 00000000 	.org 0x1C0
- 156      00000000 
- 156      00000000 
- 156      00000000 
- 156      00000000 
- 157              	int_1C0:
- 158 01c0 48000000 	      b         .
- 159              	
- 160              	# itlb
- 161 01c4 00000000 	.org 0x1E0
- 161      00000000 
- 161      00000000 
- 161      00000000 
- 161      00000000 
- 162              	int_1E0:
- 163 01e0 48000000 	      b         .
- 164              	
- 165              	# vector unavailable
- 166 01e4 00000000 	.org 0x200
- 166      00000000 
- 166      00000000 
- 166      00000000 
- 166      00000000 
- 167              	int_200:
- 168 0200 48000000 	      b         .
- 169              	
- 170              	#
- 171 0204 00000000 	.org 0x220
- 171      00000000 
- 171      00000000 
- 171      00000000 
- 171      00000000 
- 172              	int_220:
- 173 0220 48000000 	      b         .
- 174              	
- 175              	#
- 176 0224 00000000 	.org 0x240
- 176      00000000 
- 176      00000000 
- 176      00000000 
- 176      00000000 
- 177              	int_240:
- 178 0240 48000000 	      b         .
- 179              	
- 180              	#
- 181 0244 00000000 	.org 0x260
- 181      00000000 
- 181      00000000 
- 181      00000000 
- 181      00000000 
- 182              	int_260:
- 183 0260 48000000 	      b         .
- 184              	
- 185              	# doorbell
- 186 0264 00000000 	.org 0x280
- 186      00000000 
- 186      00000000 
- 186      00000000 
- 186      00000000 
- 187              	int_280:
- 188 0280 48000000 	      b         .
- 189              	
- 190              	# doorbell critical
- 191 0284 00000000 	.org 0x2A0
- 191      00000000 
- 191      00000000 
- 191      00000000 
- 191      00000000 
- 192              	int_2A0:
- 193 02a0 48000000 	      b         .
- 194              	
- 195              	# doorbell guest
- 196 02a4 00000000 	.org 0x2C0
- 196      00000000 
- 196      00000000 
- 196      00000000 
- 196      00000000 
- 197              	int_2C0:
- 198 02c0 48000000 	      b         .
- 199              	
- 200              	# doorbell guest critical
- 201 02c4 00000000 	.org 0x2E0
- 201      00000000 
- 201      00000000 
- 201      00000000 
- 201      00000000 
- 202              	int_2E0:
- 203 02e0 48000000 	      b         .
- 204              	
- 205              	# hvsc
- 206 02e4 00000000 	.org 0x300
- 206      00000000 
- 206      00000000 
- 206      00000000 
- 206      00000000 
- 207              	int_300:
- 208 0300 48000000 	      b         .
- 209              	
- 210              	# hvpriv
- 211 0304 00000000 	.org 0x320
- 211      00000000 
- 211      00000000 
- 211      00000000 
- 211      00000000 
- 212              	int_320:
- 213 0320 48000000 	      b         .
- 214              	
- 215              	# lrat
- 216 0324 00000000 	.org 0x340
- 216      00000000 
- 216      00000000 
- 216      00000000 
- 216      00000000 
- 217              	int_340:
- 218 0340 48000000 	      b         .
- 219              	
- 220              	# -------------------------------------------------------------------------------------------------
- 221              	# initial translation
- 222              	# both erats:
- 223              	# 00000000 64K: (rom, BE)
- 224              	# 00010000 64K: (ram, BE or LE)
- 225              	#
- 226 0344 00000000 	.org 0x400
- 226      00000000 
- 226      00000000 
- 226      00000000 
- 226      00000000 
- 227              	boot_start:
- 228              	
- 229 0400 7CBE6AA6 	      mfspr     r5,tir           # who am i?
- 230 0404 2C250000 	      cmpdi     r5,0x00          # skip unless T0
- 231 0408 408200E0 	      bne       init_t123
- 232              	
- 233 040c 3C608C00 	      lis       r3,0x8C00        # 32=ecl 36:37=tlbsel (10=i, 11=d)
- 234              	
- 235              	# derat 31 @00000000
- 236 0410 3800001F 	      li        r0,0x001F        # entry #31
- 237 0414 38400015 	      li        r2,0x0015        # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
- 238 0418 38800000 	      li        r4,0             # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
- 239 041c 3900023F 	      li        r8,0x023F        # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+  66              	.global _start
+  67              	
+  68              	.org 0x000
+  69              	_start:
+  70              	int_000:
+  71 0000 48000400 	      b         boot_start
+  72              	
+  73              	.ifdef TST_END
+  74              	# tst ends with ba here, which switches to priv and jumps to tst_end
+  75 0004 44000002 	      sc
+  76              	.endif
+  77              	
+  78              	# critical input
+  79 0008 00000000 	.org 0x020
+  79      00000000 
+  79      00000000 
+  79      00000000 
+  79      00000000 
+  80              	int_020:
+  81              	.ifdef INT_UNHANDLED
+  82 0020 48000000 	      b         int_unhandled
+  83              	.else
+  84              	      b         .
+  85              	.endif
+  86              	
+  87              	# debug
+  88 0024 00000000 	.org 0x040
+  88      00000000 
+  88      00000000 
+  88      00000000 
+  88      00000000 
+  89              	int_040:
+  90 0040 48000000 	      b         .
+  91              	
+  92              	# dsi
+  93 0044 00000000 	.org 0x060
+  93      00000000 
+  93      00000000 
+  93      00000000 
+  93      00000000 
+  94              	int_060:
+  95 0060 48000000 	      b         .
+  96              	
+  97              	# isi
+  98 0064 00000000 	.org 0x080
+  98      00000000 
+  98      00000000 
+  98      00000000 
+  98      00000000 
+  99              	int_080:
+ 100 0080 48000000 	      b         .
+ 101              	
+ 102              	# external
+ 103 0084 00000000 	.org 0x0A0
+ 103      00000000 
+ 103      00000000 
+ 103      00000000 
+ 103      00000000 
+ 104              	int_0A0:
+ 105 00a0 48000000 	      b         .
+ 106              	
+ 107              	# alignment
+ 108 00a4 00000000 	.org 0x0C0
+ 108      00000000 
+ 108      00000000 
+ 108      00000000 
+ 108      00000000 
+ 109              	int_0C0:
+ 110 00c0 48000000 	      b         .
+ 111              	
+ 112              	# program
+ 113 00c4 00000000 	.org 0x0E0
+ 113      00000000 
+ 113      00000000 
+ 113      00000000 
+ 113      00000000 
+ 114              	int_0E0:
+ 115 00e0 48000000 	      b         .
+ 116              	
+ 117              	# fp unavailable
+ 118 00e4 00000000 	.org 0x100
+ 118      00000000 
+ 118      00000000 
+ 118      00000000 
+ 118      00000000 
+ 119              	int_100:
+ 120 0100 48000000 	      b         .
+ 121              	
+ 122              	# sc
+ 123 0104 00000000 	.org 0x120
+ 123      00000000 
+ 123      00000000 
+ 123      00000000 
+ 123      00000000 
+ 124              	int_120:
+ 125              	.ifdef TST_END
+ 126              	# tst results haven't been saved yet; if want to call bios, need to save r1, then restore or set st
+ 127 0120 48000000 	      b         tst_end
+ 128              	.else
+ 129              	.ifdef INT_SC
+ 130              	      # lev is in 20:26, but supposed to use scv now
+ 131              	      li        r3,0
+ 132              	      mfsrr0    r4
+ 133              	      b         int_sc
+ 134              	.else
+ 135              	.ifdef INT_UNHANDLED
+ 136              	      b         int_unhandled
+ 137              	.else
+ 138              	      b         .
+ 139              	.endif
+ 140              	.endif
+ 141              	.endif
+ 142              	
+ 143              	# apu unavailable
+ 144 0124 00000000 	.org 0x140
+ 144      00000000 
+ 144      00000000 
+ 144      00000000 
+ 144      00000000 
+ 145              	int_140:
+ 146 0140 48000000 	      b         .
+ 147              	
+ 148              	# decrementer
+ 149 0144 00000000 	.org 0x160
+ 149      00000000 
+ 149      00000000 
+ 149      00000000 
+ 149      00000000 
+ 150              	int_160:
+ 151 0160 48000000 	      b         .
+ 152              	
+ 153              	# fit
+ 154 0164 00000000 	.org 0x180
+ 154      00000000 
+ 154      00000000 
+ 154      00000000 
+ 154      00000000 
+ 155              	int_180:
+ 156 0180 48000000 	      b         .
+ 157              	
+ 158              	# watchdog
+ 159 0184 00000000 	.org 0x1A0
+ 159      00000000 
+ 159      00000000 
+ 159      00000000 
+ 159      00000000 
+ 160              	int_1A0:
+ 161 01a0 48000000 	      b         .
+ 162              	
+ 163              	# dtlb
+ 164 01a4 00000000 	.org 0x1C0
+ 164      00000000 
+ 164      00000000 
+ 164      00000000 
+ 164      00000000 
+ 165              	int_1C0:
+ 166 01c0 48000000 	      b         .
+ 167              	
+ 168              	# itlb
+ 169 01c4 00000000 	.org 0x1E0
+ 169      00000000 
+ 169      00000000 
+ 169      00000000 
+ 169      00000000 
+ 170              	int_1E0:
+ 171 01e0 48000000 	      b         .
+ 172              	
+ 173              	# vector unavailable
+ 174 01e4 00000000 	.org 0x200
+ 174      00000000 
+ 174      00000000 
+ 174      00000000 
+ 174      00000000 
+ 175              	int_200:
+ 176 0200 48000000 	      b         .
+ 177              	
+ 178              	#
+ 179 0204 00000000 	.org 0x220
+ 179      00000000 
+ 179      00000000 
+ 179      00000000 
+ 179      00000000 
+ 180              	int_220:
+ 181 0220 48000000 	      b         .
+ 182              	
+ 183              	#
+ 184 0224 00000000 	.org 0x240
+ 184      00000000 
+ 184      00000000 
+ 184      00000000 
+ 184      00000000 
+ 185              	int_240:
+ 186 0240 48000000 	      b         .
+ 187              	
+ 188              	#
+ 189 0244 00000000 	.org 0x260
+ 189      00000000 
+ 189      00000000 
+ 189      00000000 
+ 189      00000000 
+ 190              	int_260:
+ 191 0260 48000000 	      b         .
+ 192              	
+ 193              	# doorbell
+ 194 0264 00000000 	.org 0x280
+ 194      00000000 
+ 194      00000000 
+ 194      00000000 
+ 194      00000000 
+ 195              	int_280:
+ 196 0280 48000000 	      b         .
+ 197              	
+ 198              	# doorbell critical
+ 199 0284 00000000 	.org 0x2A0
+ 199      00000000 
+ 199      00000000 
+ 199      00000000 
+ 199      00000000 
+ 200              	int_2A0:
+ 201 02a0 48000000 	      b         .
+ 202              	
+ 203              	# doorbell guest
+ 204 02a4 00000000 	.org 0x2C0
+ 204      00000000 
+ 204      00000000 
+ 204      00000000 
+ 204      00000000 
+ 205              	int_2C0:
+ 206 02c0 48000000 	      b         .
+ 207              	
+ 208              	# doorbell guest critical
+ 209 02c4 00000000 	.org 0x2E0
+ 209      00000000 
+ 209      00000000 
+ 209      00000000 
+ 209      00000000 
+ 210              	int_2E0:
+ 211 02e0 48000000 	      b         .
+ 212              	
+ 213              	# hvsc
+ 214 02e4 00000000 	.org 0x300
+ 214      00000000 
+ 214      00000000 
+ 214      00000000 
+ 214      00000000 
+ 215              	int_300:
+ 216 0300 48000000 	      b         .
+ 217              	
+ 218              	# hvpriv
+ 219 0304 00000000 	.org 0x320
+ 219      00000000 
+ 219      00000000 
+ 219      00000000 
+ 219      00000000 
+ 220              	int_320:
+ 221 0320 48000000 	      b         .
+ 222              	
+ 223              	# lrat
+ 224 0324 00000000 	.org 0x340
+ 224      00000000 
+ 224      00000000 
+ 224      00000000 
+ 224      00000000 
+ 225              	int_340:
+ 226 0340 48000000 	      b         .
+ 227              	
+ 228              	# -------------------------------------------------------------------------------------------------
+ 229              	# initial translation
+ 230              	# both erats:
+ 231              	# 00000000 64K: (rom, BE)
+ 232              	# 00010000 64K: (ram, BE or LE)
+ 233              	#
+ 234 0344 00000000 	.org 0x400
+ 234      00000000 
+ 234      00000000 
+ 234      00000000 
+ 234      00000000 
+ 235              	boot_start:
+ 236              	
+ 237 0400 7CBE6AA6 	      mfspr     r5,tir           # who am i?
+ 238 0404 2C250000 	      cmpdi     r5,0x00          # skip unless T0
+ 239 0408 408200E0 	      bne       init_t123
  240              	
- 241 0420 7C7CFBA6 	      mtspr     mmucr0,r3
- 242 0424 7C4011A6 	      eratwe    r2,r0,2
- 243 0428 7C8009A6 	      eratwe    r4,r0,1
- 244 042c 7D0001A6 	      eratwe    r8,r0,0
- 245 0430 4C00012C 	      isync
- 246              	
- 247 0434 39400000 	      load32    r10,BIOS_ERATW2  # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
- 247      654A0000 
- 247      614A003F 
+ 241 040c 3C608C00 	      lis       r3,0x8C00        # 32=ecl 36:37=tlbsel (10=i, 11=d)
+ 242              	
+ 243              	# derat 31 @00000000
+ 244 0410 3800001F 	      li        r0,0x001F        # entry #31
+ 245 0414 38400015 	      li        r2,0x0015        # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
+ 246 0418 38800000 	      li        r4,0             # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
+ 247 041c 3900023F 	      li        r8,0x023F        # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
  248              	
- 249              	# derat 30  @<BIOS_START>
- 250 0440 3800001E 	      li        r0,0x001E        # entry #30
- 251 0444 38800000 	      load32    r4,BIOS_START    # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
- 251      64840001 
- 251      60840000 
- 252 0450 39000000 	      load32    r8,BIOS_START
- 252      65080001 
- 252      61080000 
- 253 045c 6108023F 	      ori       r8,r8,0x023F     # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+ 249 0420 7C7CFBA6 	      mtspr     mmucr0,r3
+ 250 0424 7C4011A6 	      eratwe    r2,r0,2
+ 251 0428 7C8009A6 	      eratwe    r4,r0,1
+ 252 042c 7D0001A6 	      eratwe    r8,r0,0
+ 253 0430 4C00012C 	      isync
  254              	
- 255 0460 7D4011A6 	      eratwe    r10,r0,2
- 256 0464 7C8009A6 	      eratwe    r4,r0,1
- 257 0468 7D0001A6 	      eratwe    r8,r0,0
- 258 046c 4C00012C 	      isync
- 259              	
- 260 0470 3C608800 	      lis       r3,0x8800        # 32=ecl 36:37=tlbsel (10=i, 11=d)
- 261              	
- 262              	# ierat 15  @00000000
- 263 0474 3800000F 	      li        r0,0x000F        # entry #15
- 264 0478 3840003F 	      li        r2,0x003F        # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
- 265 047c 38800000 	      li        r4,0             # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
- 266 0480 3900023F 	      li        r8,0x023F        # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+ 255 0434 39400000 	      load32    r10,BIOS_ERATW2  # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
+ 255      654A0000 
+ 255      614A003F 
+ 256              	
+ 257              	# derat 30  @<BIOS_START>
+ 258 0440 3800001E 	      li        r0,0x001E        # entry #30
+ 259 0444 38800000 	      load32    r4,BIOS_START    # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
+ 259      64840001 
+ 259      60840000 
+ 260 0450 39000000 	      load32    r8,BIOS_START
+ 260      65080001 
+ 260      61080000 
+ 261 045c 6108023F 	      ori       r8,r8,0x023F     # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+ 262              	
+ 263 0460 7D4011A6 	      eratwe    r10,r0,2
+ 264 0464 7C8009A6 	      eratwe    r4,r0,1
+ 265 0468 7D0001A6 	      eratwe    r8,r0,0
+ 266 046c 4C00012C 	      isync
  267              	
- 268 0484 7C7CFBA6 	      mtspr     mmucr0,r3
- 269 0488 7C4011A6 	      eratwe    r2,r0,2
- 270 048c 7C8009A6 	      eratwe    r4,r0,1
- 271 0490 7D0001A6 	      eratwe    r8,r0,0
- 272 0494 4C00012C 	      isync
- 273              	
- 274              	 # *** leave the init'd entry 14 for MT access to FFFFFFC0
- 275              	 # ierat 13  @<BIOS_START>
- 276 0498 3800000D 	      li        r0,0x000D        # entry #13
- 277 049c 38800000 	      load32    r4,BIOS_START    # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
- 277      64840001 
- 277      60840000 
- 278 04a8 39000000 	      load32    r8,BIOS_START
- 278      65080001 
- 278      61080000 
- 279 04b4 6108023F 	      ori       r8,r8,0x023F     # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
- 280              	
- 281 04b8 7D4011A6 	      eratwe    r10,r0,2
- 282 04bc 7C8009A6 	      eratwe    r4,r0,1
- 283 04c0 7D0001A6 	      eratwe    r8,r0,0
- 284 04c4 4C00012C 	      isync
- 285              	
- 286 04c8 48000004 	      b         init_t0
- 287              	
- 288              	# -------------------------------------------------------------------------------------------------
- 289              	# init
- 290              	#
- 291              	
- 292              	# T0
+ 268 0470 3C608800 	      lis       r3,0x8800        # 32=ecl 36:37=tlbsel (10=i, 11=d)
+ 269              	
+ 270              	# ierat 15  @00000000
+ 271 0474 3800000F 	      li        r0,0x000F        # entry #15
+ 272 0478 3840003F 	      li        r2,0x003F        # word 2 wlc=40:41 rsvd=42 u=44:47 r=48 c=49 wimge=52:56 vf=57 ux/
+ 273 047c 38800000 	      li        r4,0             # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
+ 274 0480 3900023F 	      li        r8,0x023F        # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+ 275              	
+ 276 0484 7C7CFBA6 	      mtspr     mmucr0,r3
+ 277 0488 7C4011A6 	      eratwe    r2,r0,2
+ 278 048c 7C8009A6 	      eratwe    r4,r0,1
+ 279 0490 7D0001A6 	      eratwe    r8,r0,0
+ 280 0494 4C00012C 	      isync
+ 281              	
+ 282              	 # *** leave the init'd entry 14 for MT access to FFFFFFC0
+ 283              	 # ierat 13  @<BIOS_START>
+ 284 0498 3800000D 	      li        r0,0x000D        # entry #13
+ 285 049c 38800000 	      load32    r4,BIOS_START    # word 1 rpn(32:51)=32:51 rpn(22:31)=54:63
+ 285      64840001 
+ 285      60840000 
+ 286 04a8 39000000 	      load32    r8,BIOS_START
+ 286      65080001 
+ 286      61080000 
+ 287 04b4 6108023F 	      ori       r8,r8,0x023F     # word 0 epn=32:51 class=52:53 v=54 x=55 size=56:59 thrd=60:63   s
+ 288              	
+ 289 04b8 7D4011A6 	      eratwe    r10,r0,2
+ 290 04bc 7C8009A6 	      eratwe    r4,r0,1
+ 291 04c0 7D0001A6 	      eratwe    r8,r0,0
+ 292 04c4 4C00012C 	      isync
  293              	
- 294              	init_t0:
+ 294 04c8 48000004 	      b         init_t0
  295              	
- 296              	# set up BIOS msr
- 297              	
- 298 04cc 39400000 	      load32    r10,BIOS_MSR
- 298      654A8002 
- 298      614AB000 
- 299 04d8 7D400124 	      mtmsr     r10
- 300 04dc 4C00012C 	      isync
- 301              	# can't use load32 unless you can .set BIOS_STACK_0 to the linked value
- 302              	#      load32    r1,BIOS_STACK_0  # @stack_0
- 303              	# this ignores def
- 304              	#      lis        r1,_stack_0@h
- 305              	#      ori        r1,r1,_stack_0@l
- 306              	# this requires data load
- 307 04e0 80200000 	      lwz       r1,stack_0(r0)
- 308              	
- 309 04e4 48000020 	      b         boot_complete
- 310              	
- 311              	# except T0
- 312              	
- 313              	init_t123:
- 314              	
- 315              	# set up BIOS msr
+ 296              	# -------------------------------------------------------------------------------------------------
+ 297              	# init
+ 298              	#
+ 299              	
+ 300              	# T0
+ 301              	
+ 302              	init_t0:
+ 303              	
+ 304              	# set up BIOS msr
+ 305              	
+ 306 04cc 39400000 	      load32    r10,BIOS_MSR
+ 306      654A8002 
+ 306      614AB000 
+ 307 04d8 7D400124 	      mtmsr     r10
+ 308 04dc 4C00012C 	      isync
+ 309              	# can't use load32 unless you can .set BIOS_STACK_0 to the linked value
+ 310              	#      load32    r1,BIOS_STACK_0  # @stack_0
+ 311              	# this ignores def
+ 312              	#      lis        r1,_stack_0@h
+ 313              	#      ori        r1,r1,_stack_0@l
+ 314              	# this requires data load
+ 315 04e0 80200000 	      lwz       r1,stack_0(r0)
  316              	
- 317 04e8 39400000 	      load32    r10,BIOS_MSR
- 317      654A8002 
- 317      614AB000 
- 318 04f4 7D400124 	      mtmsr     r10
- 319 04f8 4C00012C 	      isync
- 320              	      # check tir if more than 2 threads possible
- 321 04fc 80200000 	      lwz       r1,stack_1(r0)
+ 317 04e4 48000020 	      b         boot_complete
+ 318              	
+ 319              	# except T0
+ 320              	
+ 321              	init_t123:
  322              	
- 323 0500 48000004 	      b         boot_complete
+ 323              	# set up BIOS msr
  324              	
- 325              	# -------------------------------------------------------------------------------------------------
- 326              	boot_complete:
- 327              	
- 328              	# set up thread and hop to it
- 329              	
- 330 0504 3C600000 	      lis       r3,main@h
- 331 0508 60630000 	      ori       r3,r3,main@l
- 332 050c 7C6903A6 	      mtctr     r3
- 333 0510 7C7E6AA6 	      mfspr     r3,tir           # who am i?
- 334 0514 4E800421 	      bctrl
- 335 0518 480002E4 	      b         kernel_return
- 336              	
- 337              	# -------------------------------------------------------------------------------------------------
- 338              	
- 339 051c 00000000 	.org 0x7FC
- 339      00000000 
- 339      00000000 
- 339      00000000 
- 339      00000000 
- 340              	kernel_return:
- 341 07fc 48000000 	      b         .
- 342              	
- 343              	# dec
- 344              	.org 0x800
- 345              	int_800:
- 346 0800 48000000 	      b         .
- 347              	
- 348              	# perf
- 349 0804 00000000 	.org 0x820
- 349      00000000 
- 349      00000000 
- 349      00000000 
- 349      00000000 
- 350              	int_820:
- 351 0820 48000000 	      b         .
- 352              	
- 353 0824 00000000 	.org 0x8F0
- 353      00000000 
- 353      00000000 
- 353      00000000 
- 353      00000000 
- 354              	.section .rodata
- 355 0000 00000000 	stack_0:        .long BIOS_STACK_0
- 356 0004 00000000 	stack_1:        .long BIOS_STACK_1
+ 325 04e8 39400000 	      load32    r10,BIOS_MSR
+ 325      654A8002 
+ 325      614AB000 
+ 326 04f4 7D400124 	      mtmsr     r10
+ 327 04f8 4C00012C 	      isync
+ 328              	      # check tir if more than 2 threads possible
+ 329 04fc 80200000 	      lwz       r1,stack_1(r0)
+ 330              	
+ 331 0500 48000004 	      b         boot_complete
+ 332              	
+ 333              	# -------------------------------------------------------------------------------------------------
+ 334              	boot_complete:
+ 335              	
+ 336              	# set up thread and hop to it
+ 337              	
+ 338 0504 3C600000 	      lis       r3,main@h
+ 339 0508 60630000 	      ori       r3,r3,main@l
+ 340 050c 7C6903A6 	      mtctr     r3
+ 341 0510 7C7E6AA6 	      mfspr     r3,tir           # who am i?
+ 342 0514 4E800421 	      bctrl
+ 343 0518 480002E4 	      b         kernel_return
+ 344              	
+ 345              	# -------------------------------------------------------------------------------------------------
+ 346              	
+ 347              	.ifdef TST_PASSFAIL
+ 348              	.global tst_pass
+ 349              	.global tst_fail
+ 350              	
+ 351 051c 00000000 	.org 0x7F0
+ 351      00000000 
+ 351      00000000 
+ 351      00000000 
+ 351      00000000 
+ 352              	tst_pass:
+ 353 07f0 48000000 	      b         .
+ 354              	
+ 355              	.org 0x7F4
+ 356              	tst_fail:
+ 357 07f4 48000000 	      b         .
+ 358              	.endif
+ 359              	
+ 360 07f8 00000000 	.org 0x7FC
+ 361              	kernel_return:
+ 362 07fc 48000000 	      b         .
+ 363              	
+ 364              	# dec
+ 365              	.org 0x800
+ 366              	int_800:
+ 367 0800 48000000 	      b         .
+ 368              	
+ 369              	# perf
+ 370 0804 00000000 	.org 0x820
+ 370      00000000 
+ 370      00000000 
+ 370      00000000 
+ 370      00000000 
+ 371              	int_820:
+ 372 0820 48000000 	      b         .
+ 373              	
+ 374 0824 00000000 	.org 0x8F0
+ 374      00000000 
+ 374      00000000 
+ 374      00000000 
+ 374      00000000 
+ 375              	.section .rodata
+ 376 0000 00000000 	stack_0:        .long BIOS_STACK_0
+ 377 0004 00000000 	stack_1:        .long BIOS_STACK_1

dev/src/test3/liblitex.h

@@ -0,0 +1,7 @@
+#ifndef _LITEXLIB_
+#define _LITEXLIB_
+
+#include <litex/include/base/console.h>
+
+
+#endif

dev/src/test3/linker.ld

@@ -47,7 +47,7 @@ SECTIONS
 	{
 		. = ALIGN(8);
 		_fdata = .;
-		*(.data .data.* .gnu.linkonce.d.*)
+		*(.data .data.* .sdata .gnu.linkonce.d.*)
 		FILL(0);
 		. = ALIGN(8);
 		_edata = .;
@@ -63,7 +63,7 @@ SECTIONS
 
 	.bss :
 	{
-		. = ALIGN(8);
+		. = 0x0000C000; /*relative to start of ram! ALIGN(16384*4);*/
 		_fbss = .;
 		*(.dynsbss)
 		*(.sbss .sbss.* .gnu.linkonce.sb.*)

dev/src/test3/litex

@@ -0,0 +1 @@
+/home/wtf/projects/litex/litex/soc/software

dev/src/test3/readme.md

@@ -9,6 +9,77 @@ build
 cp rom.init test3
 ```
 
+### methodology
+
+1. produce tst.s (stub code and tst definition) and link with kernel/bios
+2. tst init is done in tst.s
+3. jmp2tst
+4. tst ends (bla through kernel, sc, etc.)
+5. tst cleanup is done in tst.s
+6. tst checking, etc. is done in bios
+
+
+
+
+### debug
+
 * hanging during results save; itags not executed in cpl queue
 
 ![](cpl_hang.png)
+
+* itags 07-0B are dispatched but not marked 'executed' in cplq; they were sent to stq
+
+* not documented completely in spec (CPCR2, CPCR3, CPCR4, CPCR5); 2/3 are for hi-pri and 4/5 for med(?)
+
+   ```
+   assign spr_t0_cpcr2_fx0_cnt = cpcr2_l2[0][35:39];
+   assign spr_t0_cpcr2_fx1_cnt = cpcr2_l2[0][43:47];
+   assign spr_t0_cpcr2_lq_cnt = cpcr2_l2[0][51:55];
+   assign spr_t0_cpcr2_sq_cnt = cpcr2_l2[0][59:63];
+   assign spr_t0_cpcr3_fu0_cnt = cpcr3_l2[0][43:47];
+   assign spr_t0_cpcr3_fu1_cnt = cpcr3_l2[0][51:55];
+   assign spr_t0_cpcr3_cp_cnt = cpcr3_l2[0][57:63];
+   assign spr_t0_cpcr4_fx0_cnt = cpcr4_l2[0][35:39];
+   assign spr_t0_cpcr4_fx1_cnt = cpcr4_l2[0][43:47];
+   assign spr_t0_cpcr4_lq_cnt = cpcr4_l2[0][51:55];
+   assign spr_t0_cpcr4_sq_cnt = cpcr4_l2[0][59:63];
+   assign spr_t0_cpcr5_fu0_cnt = cpcr5_l2[0][43:47];
+   assign spr_t0_cpcr5_fu1_cnt = cpcr5_l2[0][51:55];
+   assign spr_t0_cpcr5_cp_cnt = cpcr5_l2[0][57:63];
+   ```
+
+* verilog violation in iuq_dispatch! unused thread 1 strand bits skipping force to 0, and used later as x's for credit checks which didn't stop dispatch
+
+```
+//wtf (THREADS1 is def'd)
+// iverilog sez: ../../verilog/work/iuq_dispatch.v:2322: warning: @* found no sensitivities so it will never trigger.
+// seems to be correct behavior - block won't be entered without a value change
+// make it initial, or a generate?
+`ifdef THREADS1
+   //always @(*)
+   initial
+```
+
+
+### printf from litex
+
+add putchar function to store to memory buffer
+
+```
+/home/wtf/projects/litex/litex/soc/software/libbase/vsnprintf.c
+
+plus at least these:
+
+from /home/wtf/projects/litex/litex/soc/software/include/base/
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <string.h>
+#include <ctype.h>
+#include <math.h>
+#include <stddef.h>
+
+from /home/wtf/projects/litex/litex/soc/software/include/fdlibm
+#include <fdlibm.h>
+```
+

dev/src/test3/regions.ld

@@ -1,5 +1,6 @@
 MEMORY {
 	rom : ORIGIN = 0x00000000, LENGTH = 0x00010000
-	ram : ORIGIN = 0x00010000, LENGTH = 0x00010000
+   tst : ORIGIN = 0x00010000, LENGTH = 0x00002000
+	ram : ORIGIN = 0x00012000, LENGTH = 0x0000E000
 	csr : ORIGIN = 0xFFF00000, LENGTH = 0x00010000
 }

dev/src/test3/rom.s

@@ -2,9 +2,9 @@
 rom:     file format elf32-powerpc
 
 Contents of section .kernel:
- 0000 48000400 48000f30 00000000 00000000  H...H..0........
+ 0000 48000400 44000002 00000000 00000000  H...D...........
  0010 00000000 00000000 00000000 00000000  ................
- 0020 48000cdc 00000000 00000000 00000000  H...............
+ 0020 4800104c 00000000 00000000 00000000  H..L............
  0030 00000000 00000000 00000000 00000000  ................
  0040 48000000 00000000 00000000 00000000  H...............
  0050 00000000 00000000 00000000 00000000  ................
@@ -20,7 +20,7 @@ Contents of section .kernel:
  00f0 00000000 00000000 00000000 00000000  ................
  0100 48000000 00000000 00000000 00000000  H...............
  0110 00000000 00000000 00000000 00000000  ................
- 0120 48000bdc 00000000 00000000 00000000  H...............
+ 0120 48001194 00000000 00000000 00000000  H...............
  0130 00000000 00000000 00000000 00000000  ................
  0140 48000000 00000000 00000000 00000000  H...............
  0150 00000000 00000000 00000000 00000000  ................
@@ -80,9 +80,9 @@ Contents of section .kernel:
  04b0 61080000 6108023f 7d4011a6 7c8009a6  a...a..?}@..|...
  04c0 7d0001a6 4c00012c 48000004 39400000  }...L..,H...9@..
  04d0 654a8002 614ab000 7d400124 4c00012c  eJ..aJ..}@.$L..,
- 04e0 80200904 48000020 39400000 654a8002  . ..H.. 9@..eJ..
- 04f0 614ab000 7d400124 4c00012c 80200908  aJ..}@.$L..,. ..
- 0500 48000004 3c600000 60630920 7c6903a6  H...<`..`c. |i..
+ 04e0 802008fa 48000020 39400000 654a8002  . ..H.. 9@..eJ..
+ 04f0 614ab000 7d400124 4c00012c 802008fe  aJ..}@.$L..,. ..
+ 0500 48000004 3c600000 60630c34 7c6903a6  H...<`..`c.4|i..
  0510 7c7e6aa6 4e800421 480002e4 00000000  |~j.N..!H.......
  0520 00000000 00000000 00000000 00000000  ................
  0530 00000000 00000000 00000000 00000000  ................
@@ -129,7 +129,7 @@ Contents of section .kernel:
  07c0 00000000 00000000 00000000 00000000  ................
  07d0 00000000 00000000 00000000 00000000  ................
  07e0 00000000 00000000 00000000 00000000  ................
- 07f0 00000000 00000000 00000000 48000000  ............H...
+ 07f0 48000000 48000000 00000000 48000000  H...H.......H...
  0800 48000000 00000000 00000000 00000000  H...............
  0810 00000000 00000000 00000000 00000000  ................
  0820 48000000 00000000 00000000 00000000  H...............
@@ -146,140 +146,816 @@ Contents of section .kernel:
  08d0 00000000 00000000 00000000 00000000  ................
  08e0 00000000 00000000 00000000 00000000  ................
 Contents of section .rodata:
- 08f0 43520000 58455200 43545200 4c520000  CR..XER.CTR.LR..
- 0900 54415200 0001fff8 0000fff8 00000000  TAR.............
+ 08f0 6d61696e 28256929 0a000001 fff80000  main(%i)........
+ 0900 fff80000 08080808 08080808 08282828  .............(((
+ 0910 28280808 08080808 08080808 08080808  ((..............
+ 0920 08080808 a0101010 10101010 10101010  ................
+ 0930 10101010 04040404 04040404 04041010  ................
+ 0940 10101010 10414141 41414101 01010101  .....AAAAAA.....
+ 0950 01010101 01010101 01010101 01010110  ................
+ 0960 10101010 10424242 42424202 02020202  .....BBBBBB.....
+ 0970 02020202 02020202 02020202 02020210  ................
+ 0980 10101008 00000000 00000000 00000000  ................
+ 0990 00000000 00000000 00000000 00000000  ................
+ 09a0 00000000 a0101010 10101010 10101010  ................
+ 09b0 10101010 10101010 10101010 10101010  ................
+ 09c0 10101010 01010101 01010101 01010101  ................
+ 09d0 01010101 01010101 01010110 01010101  ................
+ 09e0 01010102 02020202 02020202 02020202  ................
+ 09f0 02020202 02020202 02020210 02020202  ................
+ 0a00 02020202 41626f72 7465642e 00000000  ....Aborted.....
+ 0a10 30313233 34353637 38394142 43444546  0123456789ABCDEF
+ 0a20 4748494a 4b4c4d4e 4f505152 53545556  GHIJKLMNOPQRSTUV
+ 0a30 5758595a 00000000 30313233 34353637  WXYZ....01234567
+ 0a40 38396162 63646566 6768696a 6b6c6d6e  89abcdefghijklmn
+ 0a50 6f707172 73747576 7778797a 00000000  opqrstuvwxyz....
+ 0a60 3c4e554c 4c3e0000 000021c0 000021f0  <NULL>....!...!.
+ 0a70 000021f0 000021d0 000021f0 000021f0  ..!...!...!...!.
+ 0a80 000021f0 000021f0 000021f0 000021f0  ..!...!...!...!.
+ 0a90 000021f0 000021b0 000021f0 000021a0  ..!...!...!...!.
+ 0aa0 000021f0 000021f0 000021e0 00002928  ..!...!...!...)(
+ 0ab0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0ac0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0ad0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0ae0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0af0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b00 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b10 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b20 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b30 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b40 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b50 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b60 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b70 00002988 00002988 00002960 00002988  ..)...)...)`..).
+ 0b80 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0b90 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0ba0 00002988 00002464 00002978 00002988  ..)...$d..)x..).
+ 0bb0 00002988 00002988 00002988 00002978  ..)...)...)...)x
+ 0bc0 00002988 00002988 00002988 00002988  ..)...)...)...).
+ 0bd0 000027ac 00002954 00002704 00002988  ..'...)T..'...).
+ 0be0 00002988 00002580 00002988 00002a00  ..)...%...)...*.
+ 0bf0 00002988 00002988 0000296c 00000000  ..)...)...)l....
 Contents of section .bios:
- 0910 60000000 60000000 60000000 60000000  `...`...`...`...
- 0920 9421ffc0 90610038 3d200001 81290000  .!...a.8= ...)..
- 0930 9121000c 3d200000 39290d20 91210010  .!..= ..9). .!..
- 0940 81210038 2c090000 4182000c 3920ffff  .!.8,...A...9 ..
- 0950 48000188 3d200000 81290d00 91210008  H...= ...)...!..
- 0960 48000028 8121000c 39490004 9141000c  H..(.!..9I...A..
- 0970 81410008 814a0000 91490000 81210008  .A...J...I...!..
- 0980 39290004 91210008 3d200000 81290d00  9)...!..= ...)..
- 0990 81410008 7c0a4840 4180ffcc 3d200001  .A..|.H@A...= ..
- 09a0 81290000 91210008 48000020 3d200001  .)...!..H.. = ..
- 09b0 81290000 39400000 91490000 81210008  .)..9@...I...!..
- 09c0 39290004 91210008 3d200001 81290000  9)...!..= ...)..
- 09d0 81410008 7c0a4840 4180ffd4 3d200300  .A..|.H@A...= ..
- 09e0 91210034 81210034 3c800000 60840009  .!.4.!.4<...`...
- 09f0 7c934ba6 60000000 39200000 91210030  |.K.`...9 ...!.0
- 0a00 81210030 3c800000 60840009 7c9603a6  .!.0<...`...|...
- 0a10 60000000 39200000 9121002c 8121002c  `...9 ...!.,.!.,
- 0a20 3c800000 60840009 7c9d43a6 60000000  <...`...|.C.`...
- 0a30 39200000 91210028 81210028 3c800000  9 ...!.(.!.(<...
- 0a40 60840009 7c9c43a6 60000000 3d20fe00  `...|.C.`...= ..
- 0a50 91210024 81210024 3c800000 60840009  .!.$.!.$<...`...
- 0a60 7c9053a6 60000000 7d36faa6 91210020  |.S.`...}6...!. 
- 0a70 81210020 552905ac 9121001c 8121001c  .!. U)...!...!..
- 0a80 3c800000 60840009 7c96fba6 60000000  <...`...|...`...
- 0a90 39200000 91210018 81210018 3c800000  9 ...!...!..<...
- 0aa0 60840009 7c9053a6 60000000 39200000  `...|.S.`...9 ..
- 0ab0 91210014 81210014 3c800000 60840009  .!...!..<...`...
- 0ac0 7c9453a6 60000000 81210010 7d234b78  |.S.`....!..}#Kx
- 0ad0 48000370 48000000 7d234b78 38210040  H..pH...}#Kx8!.@
- 0ae0 4e800020 9421ffe0 7c0802a6 90010024  N.. .!..|......$
- 0af0 90610018 39200001 91210008 39200000  .a..9 ...!..9 ..
- 0b00 9121000c 81410018 3d200867 61295309  .!...A..= .ga)S.
- 0b10 7c0a4800 4182000c 39200000 91210008  |.H.A...9 ...!..
- 0b20 81210008 2c090000 41820028 3d200000  .!..,...A..(= ..
- 0b30 388908f0 38600020 48000115 7c691b78  8...8`. H...|i.x
- 0b40 2c090000 4182000c 39200001 48000008  ,...A...9 ..H...
- 0b50 39200000 91210008 81210008 2c090000  9 ...!...!..,...
- 0b60 41820028 3d200000 388908f4 38600021  A..(= ..8...8`.!
- 0b70 480000dd 7c691b78 2c090000 4182000c  H...|i.x,...A...
- 0b80 39200001 48000008 39200000 91210008  9 ..H...9 ...!..
- 0b90 81210008 2c090000 41820028 3d200000  .!..,...A..(= ..
- 0ba0 388908f8 38600022 480000a5 7c691b78  8...8`."H...|i.x
- 0bb0 2c090000 4182000c 39200001 48000008  ,...A...9 ..H...