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@ -7,9 +7,9 @@
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// https://github.com/enjoy-digital/litex
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//
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// Filename : cmod7.v
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// Device : xc7a200t-SBG484-1
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// Device : xc7k410t-ffv676-1
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// LiteX sha1 : 6932fc51
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// Date : 2022-08-03 07:06:41
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// Date : 2022-08-04 07:49:47
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//------------------------------------------------------------------------------
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@ -290,7 +290,7 @@ reg [1:0] leds_chaser = 2'd0;
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reg leds_mode = 1'd0;
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wire leds_wait;
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wire leds_done;
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reg [23:0] leds_count = 24'd12500000;
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reg [24:0] leds_count = 25'd25000000;
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reg [1:0] leds_leds = 2'd0;
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wire [1:0] buttons_status;
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wire buttons_we;
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@ -1223,9 +1223,9 @@ always @(posedge sys_clk) begin
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bus_errors <= (bus_errors + 1'd1);
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end
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end
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{tx_tick, tx_phase} <= 24'd9895604;
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{tx_tick, tx_phase} <= 23'd4947802;
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if (tx_enable) begin
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{tx_tick, tx_phase} <= (tx_phase + 24'd9895604);
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{tx_tick, tx_phase} <= (tx_phase + 23'd4947802);
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end
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basesoc_rs232phytx_state <= basesoc_rs232phytx_next_state;
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if (tx_count_rs232phytx_next_value_ce0) begin
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@ -1240,7 +1240,7 @@ always @(posedge sys_clk) begin
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rx_rx_d <= rx_rx;
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{rx_tick, rx_phase} <= 32'd2147483648;
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if (rx_enable) begin
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{rx_tick, rx_phase} <= (rx_phase + 24'd9895604);
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{rx_tick, rx_phase} <= (rx_phase + 23'd4947802);
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end
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basesoc_rs232phyrx_state <= basesoc_rs232phyrx_next_state;
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if (rx_count_rs232phyrx_next_value_ce0) begin
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@ -1345,7 +1345,7 @@ always @(posedge sys_clk) begin
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leds_count <= (leds_count - 1'd1);
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end
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end else begin
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leds_count <= 24'd12500000;
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leds_count <= 25'd25000000;
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end
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interface1_ram_bus_ack <= 1'd0;
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if (((interface1_ram_bus_cyc & interface1_ram_bus_stb) & ((~interface1_ram_bus_ack) | sram1_adr_burst))) begin
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@ -1558,7 +1558,7 @@ always @(posedge sys_clk) begin
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leds_re <= 1'd0;
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leds_chaser <= 2'd0;
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leds_mode <= 1'd0;
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leds_count <= 24'd12500000;
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leds_count <= 25'd25000000;
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buttons_re <= 1'd0;
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interface1_ram_bus_ack <= 1'd0;
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slave_sel_r <= 4'd0;
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@ -1804,9 +1804,9 @@ MMCME2_ADV #(
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.BANDWIDTH("OPTIMIZED"),
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.CLKFBOUT_MULT_F(6'd50),
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.CLKIN1_PERIOD(83.33333333333333),
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.CLKOUT0_DIVIDE_F(4'd12),
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.CLKOUT0_DIVIDE_F(3'd6),
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.CLKOUT0_PHASE(1'd0),
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.CLKOUT1_DIVIDE(3'd6),
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.CLKOUT1_DIVIDE(2'd3),
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.CLKOUT1_PHASE(1'd0),
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.CLKOUT2_DIVIDE(2'd3),
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.CLKOUT2_PHASE(1'd0),
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@ -1887,5 +1887,5 @@ MMCME2_ADV #(
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endmodule
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// -----------------------------------------------------------------------------
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// Auto-Generated by LiteX on 2022-08-03 07:06:41.
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// Auto-Generated by LiteX on 2022-08-04 07:49:47.
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//------------------------------------------------------------------------------
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