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172 lines
7.2 KiB
Verilog
172 lines
7.2 KiB
Verilog
// © IBM Corp. 2020
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// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
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// the terms below; you may not use the files in this repository except in
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// compliance with the License as modified.
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// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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//
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// Modified Terms:
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//
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// 1) For the purpose of the patent license granted to you in Section 3 of the
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// License, the "Work" hereby includes implementations of the work of authorship
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// in physical form.
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//
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// 2) Notwithstanding any terms to the contrary in the License, any licenses
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// necessary for implementation of the Work that are available from OpenPOWER
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// via the Power ISA End User License Agreement (EULA) are explicitly excluded
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// hereunder, and may be obtained from OpenPOWER under the terms and conditions
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// of the EULA.
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//
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// Unless required by applicable law or agreed to in writing, the reference design
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License
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// for the specific language governing permissions and limitations under the License.
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//
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// Additional rights, including the ability to physically implement a softcore that
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// is compliant with the required sections of the Power ISA Specification, are
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// available at no cost under the terms of the OpenPOWER Power ISA EULA, which can be
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// obtained (along with the Power ISA) here: https://openpowerfoundation.org.
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`timescale 1 ns / 1 ns
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`include "tri_a2o.vh"
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module fu_alg_or16(
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ex3_sh_lvl2,
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ex3_sticky_or16
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);
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input [0:67] ex3_sh_lvl2;
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output [0:4] ex3_sticky_or16;
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// ENTITY
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parameter tiup = 1'b1;
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parameter tidn = 1'b0;
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wire [0:7] ex3_g1o2_b;
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wire [0:7] ex3_g2o2_b;
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wire [0:7] ex3_g3o2_b;
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wire [0:7] ex3_g4o2_b;
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wire [0:3] ex3_g1o4;
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wire [0:3] ex3_g2o4;
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wire [0:3] ex3_g3o4;
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wire [0:3] ex3_g4o4;
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wire [0:1] ex3_g0o8_b;
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wire [0:1] ex3_g1o8_b;
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wire [0:1] ex3_g2o8_b;
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wire [0:1] ex3_g3o8_b;
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wire [0:1] ex3_g4o8_b;
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wire [0:4] ex3_o16;
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wire [0:4] ex3_o16_b;
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//----------------------------------------------------------
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// UnMapped original equations
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//----------------------------------------------------------
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// ex3_sticky_or16(4) <= OR( ex3_sh_lvl2[52:67] );
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// ex3_sticky_or16(3) <= OR( ex3_sh_lvl2[36:51] );
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// ex3_sticky_or16(2) <= OR( ex3_sh_lvl2[20:35] );
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// ex3_sticky_or16(1) <= OR( ex3_sh_lvl2[ 4:19] );
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// ex3_sticky_or16(0) <= OR( ex3_sh_lvl2[ 0: 3] );
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//---------------------------------------------------------
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assign ex3_g1o2_b[0] = (~(ex3_sh_lvl2[4] | ex3_sh_lvl2[5]));
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assign ex3_g1o2_b[1] = (~(ex3_sh_lvl2[6] | ex3_sh_lvl2[7]));
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assign ex3_g1o2_b[2] = (~(ex3_sh_lvl2[8] | ex3_sh_lvl2[9]));
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assign ex3_g1o2_b[3] = (~(ex3_sh_lvl2[10] | ex3_sh_lvl2[11]));
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assign ex3_g1o2_b[4] = (~(ex3_sh_lvl2[12] | ex3_sh_lvl2[13]));
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assign ex3_g1o2_b[5] = (~(ex3_sh_lvl2[14] | ex3_sh_lvl2[15]));
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assign ex3_g1o2_b[6] = (~(ex3_sh_lvl2[16] | ex3_sh_lvl2[17]));
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assign ex3_g1o2_b[7] = (~(ex3_sh_lvl2[18] | ex3_sh_lvl2[19]));
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assign ex3_g2o2_b[0] = (~(ex3_sh_lvl2[20] | ex3_sh_lvl2[21]));
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assign ex3_g2o2_b[1] = (~(ex3_sh_lvl2[22] | ex3_sh_lvl2[23]));
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assign ex3_g2o2_b[2] = (~(ex3_sh_lvl2[24] | ex3_sh_lvl2[25]));
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assign ex3_g2o2_b[3] = (~(ex3_sh_lvl2[26] | ex3_sh_lvl2[27]));
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assign ex3_g2o2_b[4] = (~(ex3_sh_lvl2[28] | ex3_sh_lvl2[29]));
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assign ex3_g2o2_b[5] = (~(ex3_sh_lvl2[30] | ex3_sh_lvl2[31]));
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assign ex3_g2o2_b[6] = (~(ex3_sh_lvl2[32] | ex3_sh_lvl2[33]));
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assign ex3_g2o2_b[7] = (~(ex3_sh_lvl2[34] | ex3_sh_lvl2[35]));
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assign ex3_g3o2_b[0] = (~(ex3_sh_lvl2[36] | ex3_sh_lvl2[37]));
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assign ex3_g3o2_b[1] = (~(ex3_sh_lvl2[38] | ex3_sh_lvl2[39]));
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assign ex3_g3o2_b[2] = (~(ex3_sh_lvl2[40] | ex3_sh_lvl2[41]));
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assign ex3_g3o2_b[3] = (~(ex3_sh_lvl2[42] | ex3_sh_lvl2[43]));
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assign ex3_g3o2_b[4] = (~(ex3_sh_lvl2[44] | ex3_sh_lvl2[45]));
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assign ex3_g3o2_b[5] = (~(ex3_sh_lvl2[46] | ex3_sh_lvl2[47]));
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assign ex3_g3o2_b[6] = (~(ex3_sh_lvl2[48] | ex3_sh_lvl2[49]));
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assign ex3_g3o2_b[7] = (~(ex3_sh_lvl2[50] | ex3_sh_lvl2[51]));
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assign ex3_g4o2_b[0] = (~(ex3_sh_lvl2[52] | ex3_sh_lvl2[53]));
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assign ex3_g4o2_b[1] = (~(ex3_sh_lvl2[54] | ex3_sh_lvl2[55]));
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assign ex3_g4o2_b[2] = (~(ex3_sh_lvl2[56] | ex3_sh_lvl2[57]));
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assign ex3_g4o2_b[3] = (~(ex3_sh_lvl2[58] | ex3_sh_lvl2[59]));
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assign ex3_g4o2_b[4] = (~(ex3_sh_lvl2[60] | ex3_sh_lvl2[61]));
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assign ex3_g4o2_b[5] = (~(ex3_sh_lvl2[62] | ex3_sh_lvl2[63]));
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assign ex3_g4o2_b[6] = (~(ex3_sh_lvl2[64] | ex3_sh_lvl2[65]));
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assign ex3_g4o2_b[7] = (~(ex3_sh_lvl2[66] | ex3_sh_lvl2[67]));
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//------------------------------------------
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assign ex3_g1o4[0] = (~(ex3_g1o2_b[0] & ex3_g1o2_b[1]));
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assign ex3_g1o4[1] = (~(ex3_g1o2_b[2] & ex3_g1o2_b[3]));
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assign ex3_g1o4[2] = (~(ex3_g1o2_b[4] & ex3_g1o2_b[5]));
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assign ex3_g1o4[3] = (~(ex3_g1o2_b[6] & ex3_g1o2_b[7]));
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assign ex3_g2o4[0] = (~(ex3_g2o2_b[0] & ex3_g2o2_b[1]));
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assign ex3_g2o4[1] = (~(ex3_g2o2_b[2] & ex3_g2o2_b[3]));
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assign ex3_g2o4[2] = (~(ex3_g2o2_b[4] & ex3_g2o2_b[5]));
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assign ex3_g2o4[3] = (~(ex3_g2o2_b[6] & ex3_g2o2_b[7]));
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assign ex3_g3o4[0] = (~(ex3_g3o2_b[0] & ex3_g3o2_b[1]));
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assign ex3_g3o4[1] = (~(ex3_g3o2_b[2] & ex3_g3o2_b[3]));
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assign ex3_g3o4[2] = (~(ex3_g3o2_b[4] & ex3_g3o2_b[5]));
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assign ex3_g3o4[3] = (~(ex3_g3o2_b[6] & ex3_g3o2_b[7]));
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assign ex3_g4o4[0] = (~(ex3_g4o2_b[0] & ex3_g4o2_b[1]));
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assign ex3_g4o4[1] = (~(ex3_g4o2_b[2] & ex3_g4o2_b[3]));
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assign ex3_g4o4[2] = (~(ex3_g4o2_b[4] & ex3_g4o2_b[5]));
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assign ex3_g4o4[3] = (~(ex3_g4o2_b[6] & ex3_g4o2_b[7]));
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//---------------------------------------------
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assign ex3_g0o8_b[0] = (~(ex3_sh_lvl2[0] | ex3_sh_lvl2[1]));
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assign ex3_g0o8_b[1] = (~(ex3_sh_lvl2[2] | ex3_sh_lvl2[3]));
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assign ex3_g1o8_b[0] = (~(ex3_g1o4[0] | ex3_g1o4[1]));
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assign ex3_g1o8_b[1] = (~(ex3_g1o4[2] | ex3_g1o4[3]));
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assign ex3_g2o8_b[0] = (~(ex3_g2o4[0] | ex3_g2o4[1]));
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assign ex3_g2o8_b[1] = (~(ex3_g2o4[2] | ex3_g2o4[3]));
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assign ex3_g3o8_b[0] = (~(ex3_g3o4[0] | ex3_g3o4[1]));
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assign ex3_g3o8_b[1] = (~(ex3_g3o4[2] | ex3_g3o4[3]));
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assign ex3_g4o8_b[0] = (~(ex3_g4o4[0] | ex3_g4o4[1]));
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assign ex3_g4o8_b[1] = (~(ex3_g4o4[2] | ex3_g4o4[3]));
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//------------------------------------------------
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assign ex3_o16[0] = (~(ex3_g0o8_b[0] & ex3_g0o8_b[1]));
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assign ex3_o16[1] = (~(ex3_g1o8_b[0] & ex3_g1o8_b[1]));
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assign ex3_o16[2] = (~(ex3_g2o8_b[0] & ex3_g2o8_b[1]));
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assign ex3_o16[3] = (~(ex3_g3o8_b[0] & ex3_g3o8_b[1]));
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assign ex3_o16[4] = (~(ex3_g4o8_b[0] & ex3_g4o8_b[1]));
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//------------------------------------------------
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assign ex3_o16_b[0] = (~(ex3_o16[0]));
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assign ex3_o16_b[1] = (~(ex3_o16[1]));
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assign ex3_o16_b[2] = (~(ex3_o16[2]));
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assign ex3_o16_b[3] = (~(ex3_o16[3]));
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assign ex3_o16_b[4] = (~(ex3_o16[4]));
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//------------------------------------------------
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assign ex3_sticky_or16[0] = (~(ex3_o16_b[0]));
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assign ex3_sticky_or16[1] = (~(ex3_o16_b[1]));
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assign ex3_sticky_or16[2] = (~(ex3_o16_b[2]));
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assign ex3_sticky_or16[3] = (~(ex3_o16_b[3]));
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assign ex3_sticky_or16[4] = (~(ex3_o16_b[4]));
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endmodule
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