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132 lines
5.2 KiB
Verilog
132 lines
5.2 KiB
Verilog
// © IBM Corp. 2020
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// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
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// the terms below; you may not use the files in this repository except in
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// compliance with the License as modified.
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// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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//
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// Modified Terms:
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//
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// 1) For the purpose of the patent license granted to you in Section 3 of the
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// License, the "Work" hereby includes implementations of the work of authorship
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// in physical form.
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//
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// 2) Notwithstanding any terms to the contrary in the License, any licenses
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// necessary for implementation of the Work that are available from OpenPOWER
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// via the Power ISA End User License Agreement (EULA) are explicitly excluded
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// hereunder, and may be obtained from OpenPOWER under the terms and conditions
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// of the EULA.
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//
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// Unless required by applicable law or agreed to in writing, the reference design
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License
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// for the specific language governing permissions and limitations under the License.
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//
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// Additional rights, including the ability to physically implement a softcore that
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// is compliant with the required sections of the Power ISA Specification, are
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// available at no cost under the terms of the OpenPOWER Power ISA EULA, which can be
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// obtained (along with the Power ISA) here: https://openpowerfoundation.org.
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`timescale 1 ns / 1 ns
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////############################################################################
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////##### Quotient digit selection logic #########
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////############################################################################
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module fu_divsqrt_add4(
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x,
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y,
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s
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);
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`include "tri_a2o.vh"
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input [0:3] x;
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input [0:3] y;
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output [0:3] s;
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wire [0:3] h;
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wire [1:3] g_b;
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wire [1:2] t_b;
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wire g2_3t3;
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wire g2_2t3;
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wire g2_1t2;
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wire t2_1t2;
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wire g4_1t3_b;
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wire g8_1t3;
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//VHDL is below in comments to preserve the labels
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//sum4_l1xor: h(0 to 3) <= ( x(0 to 3) xor y(0 to 3) ) ;--Lvl 1/2 P
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//sum4_l1nor: t_b(1 to 2) <= not( x(1 to 2) or y(1 to 2) ) ;--Lvl 1 P or G ... -KILL
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//sum4_l1nand: g_b(1 to 3) <= not( x(1 to 3) and y(1 to 3) ) ;--Lvl 1 G
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//sum4_l2not: g2_3t3 <= not( g_b(3) );--kogge-stone carry tree
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//sum4_l2oai1: g2_2t3 <= not(g_b(2) and (t_b(2) or g_b(3)) );
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//sum4_l2oai2: g2_1t2 <= not(g_b(1) and (t_b(1) or g_b(2)) );
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//sum4_l2nor: t2_1t2 <= not( (t_b(1) or t_b(2)) );
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//sum4_l3aoi: g4_1t3_b <= not(g2_1t2 or (t2_1t2 and g2_3t3) );
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//sum4_l4not3: g8_1t3 <= not( g4_1t3_b );
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//sum4_l5xor0: s(0) <= ( g8_1t3 xor h(0) );--output
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//sum4_l5xor1: s(1) <= ( g2_2t3 xor h(1) );--output
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//sum4_l5xor2: s(2) <= ( g2_3t3 xor h(2) );--output
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// s(3) <= ( h(3) );--output
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// EXAMPLE
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// tri_xor2 #(.WIDTH(1), .BTR("XOR2_X2M_A9TH")) DIVSQRT_XOR2_0(s[0], g8_1t3, h[0]);
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////////////////////////////////////////////////////////////////////////////////////////////////
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//assign h[0:3] = (x[0:3] ^ y[0:3]); //Lvl 1/2 P
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tri_xor2 #(.WIDTH(4), .BTR("XOR2_X4M_A9TH")) DIVSQRT_XOR2_00(h[0:3], x[0:3], y[0:3]);
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//assign t_b[1:2] = (~(x[1:2] | y[1:2])); //Lvl 1 P or G ... -KILL
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tri_nor2 #(.WIDTH(1), .BTR("NOR2_X4M_A9TH")) DIVSQRT_NOR2_t_b_1(t_b[1], x[1], y[1]);
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tri_nor2 #(.WIDTH(1), .BTR("NOR2_X2M_A9TH")) DIVSQRT_NOR2_t_b_2(t_b[2], x[2], y[2]);
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//assign g_b[1:3] = (~(x[1:3] & y[1:3])); //Lvl 1 G
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tri_nand2 #(.WIDTH(1), .BTR("NAND2_X1M_A9TH")) DIVSQRT_NAND2_g_b_1(g_b[1], x[1], y[1]);
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tri_nand2 #(.WIDTH(1), .BTR("NAND2_X2M_A9TH")) DIVSQRT_NAND2_g_b_2(g_b[2], x[2], y[2]);
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tri_nand2 #(.WIDTH(1), .BTR("NAND2_X4M_A9TH")) DIVSQRT_NAND2_g_b_3(g_b[3], x[3], y[3]);
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//assign g2_3t3 = (~(g_b[3])); //kogge-stone carry tree
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tri_inv #(.WIDTH(1), .BTR("INV_X6M_A9TH")) DIVSQRT_INV_g2_3t3(g2_3t3, g_b[3]);
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//assign g2_2t3 = (~(g_b[2] & (t_b[2] | g_b[3])));
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tri_oai21 #(.WIDTH(1), .BTR("OAI21_X3M_A9TH")) DIVSQRT_OAI21_g2_2t3(g2_2t3, t_b[2], g_b[3], g_b[2]);
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//assign g2_1t2 = (~(g_b[1] & (t_b[1] | g_b[2])));
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tri_oai21 #(.WIDTH(1), .BTR("OAI21_X4M_A9TH")) DIVSQRT_OAI21_g2_1t2(g2_1t2, t_b[1], g_b[2], g_b[1]);
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//assign t2_1t2 = (~((t_b[1] | t_b[2])));
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tri_nor2 #(.WIDTH(1), .BTR("NOR2_X2M_A9TH")) DIVSQRT_NOR2_t2_1t2(t2_1t2, t_b[1], t_b[2]);
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//assign g4_1t3_b = (~(g2_1t2 | (t2_1t2 & g2_3t3)));
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tri_aoi21 #(.WIDTH(1), .BTR("AOI21_X4M_A9TH")) DIVSQRT_AOI21_g4_1t3_b(g4_1t3_b, t2_1t2, g2_3t3, g2_1t2);
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//assign g8_1t3 = (~(g4_1t3_b));
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tri_inv #(.WIDTH(1), .BTR("INV_X6M_A9TH")) DIVSQRT_INV_g8_1t3(g8_1t3, g4_1t3_b);
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//assign s[0] = (g8_1t3 ^ h[0]); //output
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tri_xor2 #(.WIDTH(1), .BTR("XOR2_X4M_A9TH")) DIVSQRT_XOR2_10(s[0], g8_1t3, h[0]);
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//assign s[1] = (g2_2t3 ^ h[1]); //output
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tri_xor2 #(.WIDTH(1), .BTR("XOR2_X4M_A9TH")) DIVSQRT_XOR2_11(s[1], g2_2t3, h[1]);
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//assign s[2] = (g2_3t3 ^ h[2]); //output
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tri_xor2 #(.WIDTH(1), .BTR("XOR2_X4M_A9TH")) DIVSQRT_XOR2_12(s[2], g2_3t3, h[2]);
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assign s[3] = (h[3]); //output
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endmodule
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