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245 lines
9.3 KiB
Systemverilog
245 lines
9.3 KiB
Systemverilog
// © IBM Corp. 2020
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// Licensed under the Apache License, Version 2.0 (the "License"), as modified by
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// the terms below; you may not use the files in this repository except in
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// compliance with the License as modified.
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// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
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//
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// Modified Terms:
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//
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// 1) For the purpose of the patent license granted to you in Section 3 of the
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// License, the "Work" hereby includes implementations of the work of authorship
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// in physical form.
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//
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// 2) Notwithstanding any terms to the contrary in the License, any licenses
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// necessary for implementation of the Work that are available from OpenPOWER
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// via the Power ISA End User License Agreement (EULA) are explicitly excluded
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// hereunder, and may be obtained from OpenPOWER under the terms and conditions
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// of the EULA.
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//
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// Unless required by applicable law or agreed to in writing, the reference design
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License
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// for the specific language governing permissions and limitations under the License.
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//
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// Additional rights, including the ability to physically implement a softcore that
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// is compliant with the required sections of the Power ISA Specification, are
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// available at no cost under the terms of the OpenPOWER Power ISA EULA, which can be
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// obtained (along with the Power ISA) here: https://openpowerfoundation.org.
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// *!****************************************************************
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// *! FILENAME : mmu_a2o.vh
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// *! DESCRIPTION : Constants for a2o mmu
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// *! CONTENTS :
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// *!
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// *!****************************************************************
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`ifndef _mmu_a2o_vh_
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`define _mmu_a2o_vh_
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`define EXPAND_TYPE 2 // 0 = ibm (Umbra), 1 = non-ibm, 2 = ibm (MPG)
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`define EXPAND_TLB_TYPE 2 // 0 = erat-only, 1 = tlb logic, 2 = tlb array
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// Use this line for A2o core. Comment out for A2i design.
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`define A2O
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// comment out this line to compile for erat-only mode
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`define TLB
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// uncomment this line to compile for category E.MF (Embedded.MMU Freescale)
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`define CAT_EMF
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// uncomment this line to compile for category E.LRAT (Embedded.Logical to Real Address Translate)
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`define CAT_LRAT
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// uncomment this line to compile for category E.PT (Embedded.Page Table)
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`define CAT_EPT
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// uncomment this line to compile for wait on completion exception taken before spr updates occur
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`define WAIT_UPDATES
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// Use this line for 2 mmu h/w thread. Comment out for 1 thread design.
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`define MM_THREADS2
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// set this variable for internal thread-wise generates
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`ifdef MM_THREADS2
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`define MM_THREADS 2
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`define MM_THREADS_POOL_ENC 1
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`else
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`define MM_THREADS 1
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`define MM_THREADS_POOL_ENC 0
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`endif
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`define THDID_WIDTH 4 // this is a pre-defined tag field width
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`define PID_WIDTH 14
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`define PID_WIDTH_ERAT 8
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`define LPID_WIDTH 8
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`define T_WIDTH 3
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`define CLASS_WIDTH 2
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`define EXTCLASS_WIDTH 2
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`define TLBSEL_WIDTH 2
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`define EPN_WIDTH 52
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`define VPN_WIDTH 61
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`define ERAT_CAM_DATA_WIDTH 75
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`define ERAT_ARY_DATA_WIDTH 73
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`define ERAT_REL_DATA_WIDTH 132
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`define WS_WIDTH 2
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`define RS_IS_WIDTH 9
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`define RA_ENTRY_WIDTH 12
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`define RS_DATA_WIDTH 64
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`define DATA_OUT_WIDTH 64
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`define ERROR_WIDTH 3
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`define TLB_NUM_ENTRY 512
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`define TLB_NUM_ENTRY_LOG2 9
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`define TLB_WAYS 4
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`define TLB_ADDR_WIDTH 7
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`define TLB_WAY_WIDTH 168
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`define TLB_WORD_WIDTH 84
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`define TLB_SEQ_WIDTH 6
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`define POR_SEQ_WIDTH 3
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`define WATERMARK_WIDTH 4
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`define EPTR_WIDTH 4
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`define LRU_WIDTH 16
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`define MMUCR0_WIDTH 20
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`define MMUCR1_WIDTH 32
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`define MMUCR2_WIDTH 32
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`define MMUCR3_WIDTH 15
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`define SPR_CTL_WIDTH 3
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`define SPR_ETID_WIDTH 2
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`define SPR_ADDR_WIDTH 10
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`define SPR_DATA_WIDTH 64
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`define DEBUG_TRIGGER_WIDTH 12
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`define PERF_EVENT_WIDTH 4 // events per thread
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`define REAL_ADDR_WIDTH 42
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`define RPN_WIDTH 30 // real_addr_WIDTH-12
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`define PTE_WIDTH 64 // page table entry
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`define CHECK_PARITY 1
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`ifdef A2O
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`define DEBUG_TRACE_WIDTH 32
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`define ITAG_SIZE_ENC 7
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`define EMQ_ENTRIES 4
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`define TLB_TAG_WIDTH 122
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`define MESR1_WIDTH 24 // 4 x 6 bits, 1 of 64 events
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`define MESR2_WIDTH 24
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`define PERF_MUX_WIDTH 64 // events per bus bit
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`else
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`define DEBUG_TRACE_WIDTH 88
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`define TLB_TAG_WIDTH 110
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`define MESR1_WIDTH 20 // 4 x 5 bits, 1 of 32 events
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`define MESR2_WIDTH 20
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`define PERF_MUX_WIDTH 32 // events per bus bit
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`endif
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//tlb_tagx_d <= ([0:51] epn &
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// [52:65] pid &
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// [66:67] IS &
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// [68:69] Class &
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// [70:73] state (pr,gs,as,cm) &
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// [74:77] thdid &
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// [78:81] size &
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// [82:83] derat_miss/ierat_miss &
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// [84:85] tlbsx/tlbsrx &
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// [86:87] inval_snoop/tlbre &
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// [88:89] tlbwe/ptereload &
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// [90:97] lpid &
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// [98] indirect
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// [99] atsel &
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// [100:102] esel &
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// [103:105] hes/wq(0:1) &
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// [106:107] lrat/pt &
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// [108] record form
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// [109] endflag
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`define tagpos_epn 0
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`define tagpos_pid 52 // 14 bits
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`define tagpos_is 66
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`define tagpos_class 68
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`define tagpos_state 70 // state: 0:pr 1:gs 2:as 3:cm
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`define tagpos_thdid 74
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`define tagpos_size 78
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`define tagpos_type 82 // derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
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`define tagpos_lpid 90
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`define tagpos_ind 98
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`define tagpos_atsel 99
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`define tagpos_esel 100
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`define tagpos_hes 103
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`define tagpos_wq 104
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`define tagpos_lrat 106
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`define tagpos_pt 107
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`define tagpos_recform 108
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`define tagpos_endflag 109
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`ifdef A2O
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`define tagpos_itag 110
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`define tagpos_nonspec 117
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`define tagpos_emq 118
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`endif
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// derat,ierat,tlbsx,tlbsrx,snoop,tlbre,tlbwe,ptereload
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`define tagpos_type_derat `tagpos_type
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`define tagpos_type_ierat `tagpos_type+1
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`define tagpos_type_tlbsx `tagpos_type+2
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`define tagpos_type_tlbsrx `tagpos_type+3
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`define tagpos_type_snoop `tagpos_type+4
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`define tagpos_type_tlbre `tagpos_type+5
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`define tagpos_type_tlbwe `tagpos_type+6
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`define tagpos_type_ptereload `tagpos_type+7
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// state: 0:pr 1:gs 2:as 3:cm
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`define tagpos_pr `tagpos_state
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`define tagpos_gs `tagpos_state+1
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`define tagpos_as `tagpos_state+2
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`define tagpos_cm `tagpos_state+3
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`define waypos_epn 0
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`define waypos_size 52
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`define waypos_thdid 56
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`define waypos_class 60
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`define waypos_extclass 62
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`define waypos_lpid 66
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`define waypos_xbit 84
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`define waypos_tstmode4k 85
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`define waypos_rpn 88
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`define waypos_rc 118
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`define waypos_wlc 120
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`define waypos_resvattr 122
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`define waypos_vf 123
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`define waypos_ind 124
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`define waypos_ubits 125
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`define waypos_wimge 129
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`define waypos_usxwr 134
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`define waypos_gs 140
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`define waypos_ts 141
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`define waypos_tid 144 // 14 bits
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`define eratpos_epn 0
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`define eratpos_x 52
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`define eratpos_size 53
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`define eratpos_v 56
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`define eratpos_thdid 57
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`define eratpos_class 61
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`define eratpos_extclass 63
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`define eratpos_wren 65
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`define eratpos_rpnrsvd 66
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`define eratpos_rpn 70
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`define eratpos_r 100
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`define eratpos_c 101
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`define eratpos_relsoon 102
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`define eratpos_wlc 103
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`define eratpos_resvattr 105
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`define eratpos_vf 106
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`define eratpos_ubits 107
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`define eratpos_wimge 111
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`define eratpos_usxwr 116
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`define eratpos_gs 122
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`define eratpos_ts 123
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`define eratpos_tid 124 // 8 bits
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`define ptepos_rpn 0
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`define ptepos_wimge 40
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`define ptepos_r 45
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`define ptepos_ubits 46
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`define ptepos_sw0 50
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`define ptepos_c 51
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`define ptepos_size 52
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`define ptepos_usxwr 56
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`define ptepos_sw1 62
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`define ptepos_valid 63
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// Do NOT add any defines below this line
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`endif //_mmu_a2o_vh_
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