add core family

master
wtf 3 years ago
parent 32f86e291f
commit 5fc9b5b457

@ -22,23 +22,24 @@ GCC_FLAGS = {
} }


class A2P(CPU, AutoCSR): class A2P(CPU, AutoCSR):
name = "a2p" name = 'a2p'
human_name = "a2p" human_name = 'a2p'
family = 'ppc32'
variants = CPU_VARIANTS variants = CPU_VARIANTS
data_width = 32 data_width = 32
endianness = "big" endianness = 'big'
gcc_triple = "powerpc-linux-gnu" gcc_triple = 'powerpc-linux-gnu'
linker_output_format = "elf32-powerpc" linker_output_format = 'elf32-powerpc'
nop = "nop" nop = 'nop'
io_regions = {0x80000000: 0x80000000} # origin, length io_regions = {0x80000000: 0x80000000} # origin, length


@property @property
def mem_map(self): def mem_map(self):
return { return {
"rom": 0x00000000, 'rom': 0x00000000,
"sram": 0x00004000, 'sram': 0x00004000,
"main_ram": 0x40000000, 'main_ram': 0x40000000,
"csr": 0xf0000000, 'csr': 0xf0000000,
} }


@property @property
@ -54,7 +55,7 @@ class A2P(CPU, AutoCSR):


self.platform = platform self.platform = platform
self.variant = variant self.variant = variant
self.human_name = CPU_VARIANTS.get(variant, "A2P") self.human_name = CPU_VARIANTS.get(variant, 'A2P')
self.external_variant = None self.external_variant = None
self.reset = Signal() self.reset = Signal()
self.interrupt = Signal(32) self.interrupt = Signal(32)

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