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Update 'readme.md'

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William Flynn 1 year ago
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readme.md

@ -17,7 +17,9 @@ some bugs in CR/XER handling. @@ -17,7 +17,9 @@ some bugs in CR/XER handling.

* Need to define supported translation modes.

* SOC builds with Litex; software is built manually and runs from 'ROM' with on-board RAM.
* SOC builds with Litex; ~~software is built manually and runs from 'ROM' with on-board RAM.~~

* now running Litex BiOS, coremark, prototype test environment, etc. with async RAM interface on Cmod-A7 ISSI chip.

* Core and SOC run in Verilator/pyverilator. SOC uses emulated host UART.


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