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52 lines
1.6 KiB
Markdown
52 lines
1.6 KiB
Markdown
# Testing full Litex software build
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* manually update/install litex picolib for 32BE
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* fixes for BE in A2P_4K1W.v
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* cp A2P_4K1W.v A2P_WB.v
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and edit to rename to module A2P_WB
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```
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cd ../../build/litex
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a2p_a2o_32.py --csr-csv csr.csv
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powerpc-linux-gnu-objdump -d build/cmod7/software/bios/bios.elf > bios.d
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powerpc-linux-gnu-objdump -s build/cmod7/software/bios/bios.elf > bios.s
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bin2init build/cmod7/software/bios/bios.bin
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#if rtl updated
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#cp a2p/verilog/A2P_WB.v ../../../sim/soc/.
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#cp build/cmod7/gateware/cmod.v ../../../sim/soc/soc.v
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#sed -i "s/module cmod7/module soc/" soc.v # keep consistent naming for top
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cp bios.d ../../../sim/soc/.
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cp bios.s ../../../sim/soc/.
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cp build/cmod7/software/bios/bios.bin.hex ../../../sim/soc/cmod7_rom.init
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cd ../../../sim/soc
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top=cmod7
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mod=soc
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#if rtl updated
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#sed -i "s/module $top/module $mod/" $mod.v # keep consistent naming for top
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###############################################
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# build with or without tracing ###############
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dir=obj_dir_${mod}
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verilator -cc --exe --CFLAGS -DUART=2593 --trace --Mdir $dir --language 1364-2001 -Wno-fatal -Wno-LITENDIAN --error-limit 1 -Iunisims soc $mod tb_litex_$mod.cpp |& tee verilator_$mod.txt
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make -j6 -C $dir -f V$mod.mk V$mod
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$dir/V$mod | tee sim_soc.txt
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dir=obj_dir_${mod}_notrace
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verilator -cc --exe --CFLAGS -DUART=2593 --CFLAGS -DNO_TRACE=1 --Mdir $dir --language 1364-2001 -Wno-fatal -Wno-LITENDIAN --error-limit 1 -Iunisims soc $mod tb_litex_$mod.cpp |& tee verilator_$mod.txt
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make -j6 -C $dir -f V$mod.mk V$mod
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$dir/V$mod
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################################################
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vcd2fst a2plitex.vcd soc.fst
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rm a2p_soc.vcd
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gtkwave soc.fst soc.gtkw
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``` |