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104 lines
2.7 KiB
Markdown
104 lines
2.7 KiB
Markdown
# arci
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* achitectural and compliancy tests for verifying cores (static bugs, compliancy aberrations)
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* test generation/build/run
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### experimenting
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* gen and run simple.tst
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```
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lxterm /dev/ttyUSB1 --kernel arci.bin --kernel-adr 0x120000
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```
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```
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BIOS built on Nov 7 2021 11:47:53
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BIOS CRC failed (expected 00000000, got ee67935c)
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The system will continue, but expect problems.
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Migen git sha1: 27dbf03
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LiteX git sha1: 78c1751c
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--=============== SoC ==================--
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CPU: A2P_WB @ 100MHz
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BUS: WISHBONE 32-bit @ 4GiB
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CSR: 32-bit data
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ROM: 64KiB
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SRAM: 512KiB
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--============== Boot ==================--
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Booting from serial...
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Press Q or ESC to abort boot completely.
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sL5DdSMmkekro
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[LXTERM] Received firmware download request from the device.
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[LXTERM] Uploading arci.bin to 0x00120000 (17576 bytes)...
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[LXTERM] Upload complete (9.8KB/s).
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[LXTERM] Booting the device.
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[LXTERM] Done.
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--============= Console ================--
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litex> boot 0x120000
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Executing booted program at 0x00120000
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--============= Liftoff! ===============--
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Thunderbirds are go!!!
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Invoking test...
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Test completed. Checking results...
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Instructions
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00123500: 38630001
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00123504: 38630001
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00123508: 38630001
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0012350C: 3880FFFD
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00123510: 7C841A15
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Facilities
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R00: 00000000 00000000 00000000
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R01: 00000000 00000000 00000000
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R02: 00000000 00000000 00000000
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R03: 00000000 00000003 00000003
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R04: 00000000 00000000 00000000
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R05: 00000000 00000000 00000000
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R06: 00000000 00000000 00000000
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R07: 00000000 00000000 00000000
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R08: 00000000 00000000 00000000
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R09: 00000000 00000000 00000000
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R10: 00000000 00000000 00000000
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R11: 00000000 00000000 00000000
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R12: 00000000 00000000 00000000
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R13: 00000000 00000000 00000000
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R14: 00000000 00000000 00000000
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R15: 00000000 00000000 00000000
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R16: 00000000 00000000 00000000
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R17: 00000000 00000000 00000000
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R18: 00000000 00000000 00000000
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R19: 00000000 00000000 00000000
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R20: 00000000 00000000 00000000
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R21: 00000000 00000000 00000000
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R22: 00000000 00000000 00000000
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R23: 00000000 00000000 00000000
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R24: 00000000 00000000 00000000
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R25: 00000000 00000000 00000000
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R26: 00000000 00000000 00000000
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R27: 00000000 00000000 00000000
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R28: 00000000 00000000 00000000
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R29: 00000000 00000000 00000000
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R30: 00000000 00000000 00000000
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R31: 00000000 00000000 00000000
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CR: 00000000 20000000 20000000
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XER: 00000000 00000000 00000000
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CTR: F0000000 F0000000 F0000000
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LR: 00000000 00000000 00000000
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TAR: 00000000 00000000 00000000
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You has opulence.
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Here you would run another test automatically, or temp halt, or reboot bios...
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```
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