9867fb6149
Add a decode for the nop instruction
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We want these to go out without any GPR dependencies, so add
a specific entry in decode for them.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
acdb2ea157
No need to gate nia or insn in decode1
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Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
b9e28598b4
Explicitly check against '1' in if statements
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nvc doesn't like what I think is a VHDL 2008 construct. Lets just
check against '1' explicitly.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
a2df2a10a2
Remove sim console
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We can force all existing code to use the UART console
by passing 0 in bit zero of the sim config register.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
92a7152370
Rework pipeline, add stall and flush signals
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This adds stall and flush signals to the pipeline.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
9687034d78
Add a decode bit to mark an instruction as single through the pipeline
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This is used by the pipelining patches. Mark everyone as single through
the pipeline to start.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
b0ade2857f
decode1 array fix header
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
9fbaea6f08
Rework CR file and add forwarding
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Handle the CR as a single field with per nibble enables. Forward any
writes in the same cycle.
If this proves to be an issue for timing, we may want to revisit
this in the future. For now, it keeps things simple.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
5a29cb4699
Initial import of microwatt
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Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
Anton Blanchard