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caravel-mpw7-20221125
caravel-mpw7-20220822
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trace-test
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litedram-update
liteeth-update
fix-sdcard
fpu-init
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caravel-mpw6-20220530
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alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
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dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
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2 Commits (67b6117ebf05f7f499aa8020b091bd82104c117b)

Author SHA1 Message Date
Anton Blanchard 20674e0d65 Add SPI configuration to Xilinx constraint files 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 6 years ago
Anton Blanchard 270d7b1b9a Cmod A7-35 support 
This adds support for the Digilane Cmod A7-35.

I had to use the MMCM because the clock (12 MHz) is below the PLL
minimum of 19 MHz.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 6 years ago