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caravel-mpw7-20221125
caravel-mpw7-20220822
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trace-test
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litedram-update
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fix-sdcard
fpu-init
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caravel-mpw6-20220530
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log2ceil-issue
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boxarty-20211011
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3 Commits (7652452367c634e85146d565fd6296572ce77c11)

Author SHA1 Message Date
Anton Blanchard ab86b58d95 Exit cleanly from testbench on success 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 5 years ago
Paul Mackerras e08ca4ab8e countzero: Add a register to help make timing 
This adds a register in the middle of the countzero computation,
so that we now have two cycles to count leading or trailing zeroes
instead of just one.  Execute1 now outputs a one-cycle stall signal
when it encounters a cntlz* or cnttz* instruction.  With this,
the countzero path no longer fails timing on the Artix-7 at 100MHz.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago
Paul Mackerras 4396eddc31 countzero: Add a testbench 
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago