Commit Graph

8 Commits (8f537c13bc1fe4b3a24c941d469316d61483cbcb)

Author SHA1 Message Date
Paul Mackerras d1c7b654bb wishbone_arbiter: Remove early_sel optimization when > 4 masters
For the sake of overall timing in larger SoCs, remove the early_sel
optimization when there are more than 4 masters.

Also make the ack and stall signals to a particular master depend on
that master's cyc, not on the busy signal, which can depend on any
master's cyc.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2 weeks ago
Benjamin Herrenschmidt cff4b13a9b wb_arbiter: Early master selection
This flips the arbiter muxes on the same cycle as a new request
comes in, thus avoiding a cycle latency.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
Benjamin Herrenschmidt bc2acfde2f wb_arbiter: Make arbiter size parametric
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
Benjamin Herrenschmidt 472d8f94a2 wb_arbiter: Avoid IDLE cycle when not changing master
Consecutive accesses from the same master shouldn't need an IDLE
cycle. Completely remove the IDLE state and switch master when
the bus is idle, but stay on the last selected one between cycles.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
Benjamin Herrenschmidt 7a4a9b6377 wb_arbiter: Forward stall signals
They are set to '1' for non-selected devices

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
Benjamin Herrenschmidt 1206dfe18c Use a 3 way WB arbiter and cleanup fpga toplevel
The 3rd master is currently unused, it will host the WB debug module.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
Anton Blanchard df1165bdfc Reformat wishbone code
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
5 years ago
Anton Blanchard 5a29cb4699 Initial import of microwatt
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
6 years ago