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3 Commits (b628af6176bd0bfa0289fa823ec205f48988ec53)

Author SHA1 Message Date
Paul Mackerras b628af6176 FPU: Implement fmr and related instructions 
This implements fmr, fneg, fabs, fnabs and fcpsgn and adds tests
for them.

This adds logic to unpack and repack floating-point data from the
64-bit packed form (as stored in memory and the register file) into
the unpacked form in the fpr_reg_type record.  This is not strictly
necessary for fmr et al., but will be useful for when we do actual
arithmetic.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago
Paul Mackerras fc2968f132 FPU: Implement remaining FPSCR-related instructions 
This implements mcrfs, mtfsfi, mtfsb0/1, mffscr, mffscrn, mffscrni and
mffsl.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago
Paul Mackerras 856e9e955f core: Add framework for an FPU 
This adds the skeleton of a floating-point unit and implements the
mffs and mtfsf instructions.

Execute1 sends FP instructions to the FPU and receives busy,
exception, FP interrupt and illegal interrupt signals from it.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
 5 years ago