Instead of connecting core_alt_reset to litedram init_done, it moves to
a syscon register bit. This simplifies top- files and future soc_reset
handling. sdram main.c can unset the alt_reset bit after sdram init.
Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>
As with the DRAM configuration, the DC-SCM board uses the same PHY as
the Nexys Video and works with it's generated VHDL.
Signed-off-by: Joel Stanley <joel@jms.id.au>
This uses the exact same gateware as the nexys video, since the DRAM
connection is identical to the nexys video down to the pin assignments
on the FPGA. The only minor difference is that the DRAM chip on the
dc-scm is a MT41K256M16TW vs. a ...HA part on the nexys video.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
[joel: rebase and tweaks]
Signed-off-by: Joel Stanley <joel@jms.id.au>
works with:
fusesoc build --target=antmicro-artix-dc-scm microwatt --ram_init_file=../hello_world/hello_world.hex
Signed-off-by: Michael Neuling <mikey@neuling.org>
[joel: Fixes and updates]
Signed-off-by: Joel Stanley <joel@jms.id.au>
Matt Johnston
Paul Mackerras
Michael Neuling