cores
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microwatt
mirror of https://github.com/antonblanchard/microwatt
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caravel-mpw7-20221125
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trace-test
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litedram-update
liteeth-update
fix-sdcard
fpu-init
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core_debug-init
icache-unused-sig
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divider-init
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fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
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alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
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jtag-port-2
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nia-debug
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3 Commits (c64bf23c1a815f21255bb92921947f5318c37789)

Author SHA1 Message Date
Michael Neuling 83d773090e Fix verific script with new VHDL files 
This really needs to be auto generated, but here we are.

Signed-off-by: Michael Neuling <mikey@neuling.org>
 6 years ago
Michael Neuling 4d5abfb430 Remove dynamic ranges from code 
Some VHDL compilers like verific [1] don't like these, so let's remove
them. Lots of random code changes, but passes make check.

Also add basic script to run verific and generate verilog.

1. https://www.verific.com/

Signed-off-by: Michael Neuling <mikey@neuling.org>
 6 years ago
Anton Blanchard 5a29cb4699 Initial import of microwatt 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 6 years ago