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122 lines
2.5 KiB
ArmAsm
122 lines
2.5 KiB
ArmAsm
/* Copyright 2013-2014 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define STACK_TOP 0x2000
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#define FIXUP_ENDIAN \
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tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \
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b 191f; /* Skip trampoline if endian is good */ \
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.long 0xa600607d; /* mfmsr r11 */ \
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.long 0x01006b69; /* xori r11,r11,1 */ \
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.long 0x05009f42; /* bcl 20,31,$+4 */ \
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.long 0xa602487d; /* mflr r10 */ \
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.long 0x14004a39; /* addi r10,r10,20 */ \
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.long 0xa64b5a7d; /* mthsrr0 r10 */ \
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.long 0xa64b7b7d; /* mthsrr1 r11 */ \
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.long 0x2402004c; /* hrfid */ \
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191:
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/* Load an immediate 64-bit value into a register */
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#define LOAD_IMM64(r, e) \
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lis r,(e)@highest; \
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ori r,r,(e)@higher; \
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rldicr r,r, 32, 31; \
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oris r,r, (e)@h; \
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ori r,r, (e)@l;
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.section ".head","ax"
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/*
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* Microwatt currently enters in LE mode at 0x0, so we don't need to
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* do any endian fix ups>
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*/
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. = 0
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.global _start
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_start:
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b boot_entry
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/* QEMU enters at 0x10 */
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. = 0x10
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FIXUP_ENDIAN
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b boot_entry
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. = 0x100
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FIXUP_ENDIAN
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b boot_entry
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.global boot_entry
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boot_entry:
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LOAD_IMM64(%r10,__bss_start)
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LOAD_IMM64(%r11,__bss_end)
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subf %r11,%r10,%r11
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addi %r11,%r11,63
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srdi. %r11,%r11,6
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beq 2f
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mtctr %r11
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1: dcbz 0,%r10
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addi %r10,%r10,64
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bdnz 1b
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/* setup stack */
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2: LOAD_IMM64(%r1,__stack_top)
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li %r0,0
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stdu %r0,-32(%r1)
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LOAD_IMM64(%r12, main)
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mtctr %r12
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bctrl
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attn // terminate on exit
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b .
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#define EXCEPTION(nr) \
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.= nr ;\
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b .
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/* More exception stubs */
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EXCEPTION(0x300)
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EXCEPTION(0x380)
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EXCEPTION(0x400)
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EXCEPTION(0x480)
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EXCEPTION(0x500)
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EXCEPTION(0x600)
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EXCEPTION(0x700)
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EXCEPTION(0x800)
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EXCEPTION(0x900)
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EXCEPTION(0x980)
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EXCEPTION(0xa00)
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EXCEPTION(0xb00)
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EXCEPTION(0xc00)
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EXCEPTION(0xd00)
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EXCEPTION(0xe00)
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EXCEPTION(0xe20)
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EXCEPTION(0xe40)
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EXCEPTION(0xe60)
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EXCEPTION(0xe80)
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EXCEPTION(0xf00)
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EXCEPTION(0xf20)
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EXCEPTION(0xf40)
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EXCEPTION(0xf60)
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EXCEPTION(0xf80)
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#if 0
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EXCEPTION(0x1000)
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EXCEPTION(0x1100)
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EXCEPTION(0x1200)
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EXCEPTION(0x1300)
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EXCEPTION(0x1400)
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EXCEPTION(0x1500)
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EXCEPTION(0x1600)
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#endif
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