dut: add processor interface.
parent
3b39aa7eae
commit
3102468806
@ -1,2 +1,10 @@
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from importlib import metadata
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__version__ = metadata.version(__package__)
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from .dut import *
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__all__ = [
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"Interface",
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]
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@ -0,0 +1,22 @@
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from amaranth import *
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__all__ = ["Interface"]
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class Interface(Record):
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"""POWER-FV interface.
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The interface between the formal testbench and the processor-under-test.
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Attributes
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----------
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stb : Signal
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Instruction strobe. Asserted when the processor retires an instruction. Other signals are
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only valid when ``stb`` is asserted.
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"""
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def __init__(self, *, name=None, src_loc_at=0):
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layout = [
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("stb", 1),
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]
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super().__init__(layout, name=name, src_loc_at=1 + src_loc_at)
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