Add checks for BCD Assist instructions.
parent
23dcd80a9e
commit
4bf2398208
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from power_fv.insn import const
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from power_fv.insn.spec.bcd import BCDAssistSpec
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from power_fv.check.insn import InsnCheck
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__all__ = ["CDTBCD", "CBCDTD", "ADDG6S"]
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class CDTBCD (InsnCheck, spec_cls=BCDAssistSpec, insn_cls=const.CDTBCD): pass
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class CBCDTD (InsnCheck, spec_cls=BCDAssistSpec, insn_cls=const.CBCDTD): pass
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class ADDG6S (InsnCheck, spec_cls=BCDAssistSpec, insn_cls=const.ADDG6S): pass
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from amaranth import *
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from power_fv import pfv
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from power_fv.insn.const import *
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from . import InsnSpec
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from .utils import iea
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__all__ = ["BCDAssistSpec"]
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class BCDAssistSpec(InsnSpec, Elaboratable):
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def __init__(self, insn):
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self.pfv = pfv.Interface()
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self.insn = insn
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def elaborate(self, platform):
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m = Module()
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m.d.comb += [
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self.pfv.stb .eq(1),
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self.pfv.insn.eq(Cat(Const(0, 32), self.insn.as_value())),
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self.pfv.intr.eq(0),
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self.pfv.nia .eq(iea(self.pfv.cia + 4, self.pfv.msr.r_data.sf)),
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self.pfv.msr.r_mask.sf.eq(1),
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]
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bcd_layout = [(f, 1) for f in reversed("abcdefghijkm")]
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dpd_layout = [(f, 1) for f in reversed("pqrstuvwxy")]
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def _bcd_to_dpd(bcd, dpd):
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# (see PowerISA v3.1, Book I, Appendix B.1)
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stmts = [
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dpd.p.eq((bcd.f & bcd.a & bcd.i & ~bcd.e) | (bcd.j & bcd.a & ~bcd.i) | (bcd.b & ~bcd.a)),
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dpd.q.eq((bcd.g & bcd.a & bcd.i & ~bcd.e) | (bcd.k & bcd.a & ~bcd.i) | (bcd.c & ~bcd.a)),
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dpd.r.eq(bcd.d),
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dpd.s.eq((bcd.j & ~bcd.a & bcd.e & ~bcd.i) | (bcd.f & ~bcd.i & ~bcd.e) | (bcd.f & ~bcd.a & ~bcd.e) | (bcd.e & bcd.i)),
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dpd.t.eq((bcd.k & ~bcd.a & bcd.e & ~bcd.i) | (bcd.g & ~bcd.i & ~bcd.e) | (bcd.g & ~bcd.a & ~bcd.e) | (bcd.a & bcd.i)),
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dpd.u.eq(bcd.h),
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dpd.v.eq(bcd.a | bcd.e | bcd.i),
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dpd.w.eq((~bcd.e & bcd.j & ~bcd.i) | (bcd.e & bcd.i) | bcd.a),
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dpd.x.eq((~bcd.a & bcd.k & ~bcd.i) | (bcd.a & bcd.i) | bcd.e),
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dpd.y.eq(bcd.m),
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]
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return stmts
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def _dpd_to_bcd(dpd, bcd):
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# (see PowerISA v3.1, Book I, Appendix B.2)
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stmts = [
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bcd.a.eq((~dpd.s & dpd.v & dpd.w) | (dpd.t & dpd.v & dpd.w & dpd.s) | (dpd.v & dpd.w & ~dpd.x)),
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bcd.b.eq((dpd.p & dpd.s & dpd.x & ~dpd.t) | (dpd.p & ~dpd.w) | (dpd.p & ~dpd.v)),
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bcd.c.eq((dpd.q & dpd.s & dpd.x & ~dpd.t) | (dpd.q & ~dpd.w) | (dpd.q & ~dpd.v)),
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bcd.d.eq(dpd.r),
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bcd.e.eq((dpd.v & ~dpd.w & dpd.x) | (dpd.s & dpd.v & dpd.w & dpd.x) | (~dpd.t & dpd.v & dpd.x & dpd.w)),
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bcd.f.eq((dpd.p & dpd.t & dpd.v & dpd.w & dpd.x & ~dpd.s) | (dpd.s & ~dpd.x & dpd.v) | (dpd.s & ~dpd.v)),
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bcd.g.eq((dpd.q & dpd.t & dpd.w & dpd.v & dpd.x & ~dpd.s) | (dpd.t & ~dpd.x & dpd.v) | (dpd.t & ~dpd.v)),
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bcd.h.eq(dpd.u),
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bcd.i.eq((dpd.t & dpd.v & dpd.w & dpd.x) | (dpd.s & dpd.v & dpd.w & dpd.x) | (dpd.v & ~dpd.w & ~dpd.x)),
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bcd.j.eq((dpd.p & ~dpd.s & ~dpd.t & dpd.w & dpd.v) | (dpd.s & dpd.v & ~dpd.w & dpd.x) | (dpd.p & dpd.w & ~dpd.x & dpd.v) | (dpd.w & ~dpd.v)),
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bcd.k.eq((dpd.q & ~dpd.s & ~dpd.t & dpd.v & dpd.w) | (dpd.t & dpd.v & ~dpd.w & dpd.x) | (dpd.q & dpd.v & dpd.w & ~dpd.x) | (dpd.x & ~dpd.v)),
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bcd.m.eq(dpd.y),
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]
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return stmts
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if isinstance(self.insn, CDTBCD):
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dpd_0 = Record([("lo", dpd_layout), ("hi", dpd_layout)])
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bcd_0 = Record([("lo", bcd_layout), ("hi", bcd_layout)])
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dpd_1 = Record([("lo", dpd_layout), ("hi", dpd_layout)])
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bcd_1 = Record([("lo", bcd_layout), ("hi", bcd_layout)])
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m.d.comb += [
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self.pfv.rs.index.eq(self.insn.RS),
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self.pfv.rs.r_stb.eq(1),
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dpd_0.eq(self.pfv.rs.r_data[63-31:64-12]),
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dpd_1.eq(self.pfv.rs.r_data[63-63:64-44]),
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_dpd_to_bcd(dpd_0.lo, bcd_0.lo),
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_dpd_to_bcd(dpd_0.hi, bcd_0.hi),
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_dpd_to_bcd(dpd_1.lo, bcd_1.lo),
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_dpd_to_bcd(dpd_1.hi, bcd_1.hi),
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self.pfv.ra.index .eq(self.insn.RA),
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self.pfv.ra.w_stb .eq(1),
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self.pfv.ra.w_data[63-31:64- 8].eq(bcd_0),
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self.pfv.ra.w_data[63-63:64-40].eq(bcd_1),
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]
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elif isinstance(self.insn, CBCDTD):
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bcd_0 = Record([("lo", bcd_layout), ("hi", bcd_layout)])
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dpd_0 = Record([("lo", dpd_layout), ("hi", dpd_layout)])
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bcd_1 = Record([("lo", bcd_layout), ("hi", bcd_layout)])
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dpd_1 = Record([("lo", dpd_layout), ("hi", dpd_layout)])
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m.d.comb += [
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self.pfv.rs.index.eq(self.insn.RS),
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self.pfv.rs.r_stb.eq(1),
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bcd_0.eq(self.pfv.rs.r_data[63-31:64- 8]),
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bcd_1.eq(self.pfv.rs.r_data[63-63:64-40]),
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_bcd_to_dpd(bcd_0.lo, dpd_0.lo),
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_bcd_to_dpd(bcd_0.hi, dpd_0.hi),
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_bcd_to_dpd(bcd_1.lo, dpd_1.lo),
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_bcd_to_dpd(bcd_1.hi, dpd_1.hi),
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self.pfv.ra.index.eq(self.insn.RA),
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self.pfv.ra.w_stb.eq(1),
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self.pfv.ra.w_data[63-31:64-12].eq(dpd_0),
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self.pfv.ra.w_data[63-63:64-44].eq(dpd_1),
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]
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elif isinstance(self.insn, ADDG6S):
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src_a = Signal(unsigned(65))
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src_b = Signal(unsigned(65))
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result = Signal(unsigned(65))
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cout_6s = Signal(unsigned(64))
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m.d.comb += [
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self.pfv.ra.index.eq(self.insn.RA),
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self.pfv.ra.r_stb.eq(1),
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self.pfv.rb.index.eq(self.insn.RB),
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self.pfv.rb.r_stb.eq(1),
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src_a .eq(self.pfv.ra.r_data),
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src_b .eq(self.pfv.rb.r_data),
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result.eq(src_a + src_b),
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]
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for i in range(64//4):
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a_bit = src_a [i*4 + 4]
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b_bit = src_b [i*4 + 4]
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r_bit = result[i*4 + 4]
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c_nib = cout_6s.word_select(i, width=4)
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m.d.comb += c_nib.eq(Mux(a_bit ^ b_bit ^ r_bit, 0x0, 0x6))
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m.d.comb += [
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self.pfv.rt.index .eq(self.insn.RT),
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self.pfv.rt.w_stb .eq(1),
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self.pfv.rt.w_data.eq(cout_6s),
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]
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else:
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assert False
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return m
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