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174 lines
7.9 KiB
Markdown
174 lines
7.9 KiB
Markdown
# Cocotb + Icarus Verilog Array Sim
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Cocotb test created from original pyverilator version - run random commands using 64x72 logical array.
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## Array Wrapper
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* compile and run
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```
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make -f Makefile_sdr_32x32 build
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```
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* just run (tb.py changes, etc.)
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```
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make -f Makefile_sdr_32x32 run
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```
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* results
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```
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make -f Makefile_sdr_32x32 run >& sim_32x32.txt
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MODULE=tb TESTCASE=tb_32x32 TOPLEVEL=test_ra_sdr_32x32 TOPLEVEL_LANG=verilog \
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/usr/local/bin/vvp -M /home/wtf/.local/lib/python3.8/site-packages/cocotb/libs -m libcocotbvpi_icarus build_32x32/sim.vvp
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-.--ns INFO cocotb.gpi ..mbed/gpi_embed.cpp:76 in set_program_name_in_venv Did not detect Python virtual environment. Using system-wide Python interpreter
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-.--ns INFO cocotb.gpi ../gpi/GpiCommon.cpp:99 in gpi_print_registered_impl VPI registered
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0.00ns INFO Running on Icarus Verilog version 12.0 (devel)
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0.00ns INFO Running tests with cocotb v1.7.0.dev0 from /home/wtf/.local/lib/python3.8/site-packages/cocotb
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0.00ns INFO Seeding Python random module with 1654704020
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0.00ns INFO Found test tb.tb_32x32
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0.00ns INFO running tb_32x32 (1/0)
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ToySRAM 32x32 array test
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0.00ns INFO [00000001] [00000001] Resetting...
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9.00ns INFO [00000010] [00000010] Releasing reset.
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25.00ns INFO [00000027] Initializing array...
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25.00ns INFO [00000027] Port=0 WR @00=00555500
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26.00ns INFO [00000028] Port=0 WR @01=01555501
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27.00ns INFO [00000029] Port=0 WR @02=02555502
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28.00ns INFO [00000030] Port=0 WR @03=03555503
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29.00ns INFO [00000031] Port=0 WR @04=04555504
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30.00ns INFO [00000032] Port=0 WR @05=05555505
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31.00ns INFO [00000033] Port=0 WR @06=06555506
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32.00ns INFO [00000034] Port=0 WR @07=07555507
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33.00ns INFO [00000035] Port=0 WR @08=08555508
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...
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10037.50ns INFO [00010039] Port=0 WR @12=6C6FD11E
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10038.50ns INFO [00010040] Port=0 WR @17=545B517F
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10039.50ns INFO [00010041] Port=0 RD @08
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10039.50ns INFO [00010041] Port=1 RD @0E
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10041.50ns INFO [00010043] * RD COMPARE * port=0 adr=08 act=BE99B13E exp=BE99B13E
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10041.50ns INFO [00010043] * RD COMPARE * port=1 adr=0E act=97A2D496 exp=97A2D496
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10041.50ns INFO [00010043] Port=0 WR @1A=76434F37
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10041.50ns INFO [00010043] Port=1 RD @0D
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10042.50ns INFO [00010044] Port=0 WR @12=069ECCCE
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10042.50ns INFO [00010044] Port=0 RD @13
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10043.50ns INFO [00010045] * RD COMPARE * port=1 adr=0D act=C1C0D7D8 exp=C1C0D7D8
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10043.50ns INFO [00010045] Port=0 WR @05=58E318E7
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10043.50ns INFO [00010045] Port=0 RD @10
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10043.50ns INFO [00010045] Port=1 RD @00
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10044.50ns INFO [00010046] * RD COMPARE * port=0 adr=13 act=1D975E90 exp=1D975E90
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10044.50ns INFO [00010046] Port=0 RD @14
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10044.50ns INFO [00010046] Port=1 RD @1D
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10045.50ns INFO [00010047] * RD COMPARE * port=0 adr=10 act=F82AB140 exp=F82AB140
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10045.50ns INFO [00010047] * RD COMPARE * port=1 adr=00 act=3C2E724D exp=3C2E724D
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10046.50ns INFO [00010048] * RD COMPARE * port=0 adr=14 act=1A27AA07 exp=1A27AA07
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10046.50ns INFO [00010048] * RD COMPARE * port=1 adr=1D act=5B9AE71C exp=5B9AE71C
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10047.50ns INFO [00010049] Quiescing...
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10057.00ns INFO [00010059] Done.
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10057.00ns INFO [00010059] Final State
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Reads Port 0: 4005
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Reads Port 1: 4052
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Writes Port 0: 4055
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10057.00ns INFO [00010059] [00010059] You has opulence.
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10057.00ns INFO tb_32x32 passed
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10057.00ns INFO **************************************************************************************
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** TEST STATUS SIM TIME (ns) REAL TIME (s) RATIO (ns/s) **
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**************************************************************************************
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** tb.tb_32x32 PASS 10057.00 8.54 1177.70 **
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**************************************************************************************
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** TESTS=0 PASS=1 FAIL=0 SKIP=0 10057.00 8.56 1174.42 **
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**************************************************************************************
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VCD info: dumpfile test_ra_sdr_32x32.vcd opened for output.
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VCD warning: $dumpvars: Package ($unit) is not dumpable with VCD.
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make[1]: Leaving directory '/media/wtf/WD_USBC_4T/projects/toy-sram/rtl/sim/coco'
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vcd2fst test_ra_sdr_32x32.vcd test_ra_sdr_32x32.fst
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#rm test_ra_sdr_32x32.vcd
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```
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```
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gtkwave test_ra_sdr_32x32.fst wtf_test_ra_sdr_32x32.gtkw
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```
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## Test Site
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* compile and run
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```
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make -f Makefile_site build
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```
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* just run (tb.py changes, etc.)
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```
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make -f Makefile_site run
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```
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* results
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```
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0.00ns INFO Running on Icarus Verilog version 12.0 (devel)
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0.00ns INFO Running tests with cocotb v1.7.0.dev0 from /home/wtf/.local/lib/python3.8/site-packages/cocotb
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0.00ns INFO Seeding Python random module with 1655136638
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0.00ns INFO Found test tb.tb_site
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0.00ns INFO running tb_site (1/0)
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ToySRAM site test
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VCD info: dumpfile test_site.vcd opened for output.
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VCD warning: $dumpvars: Package ($unit) is not dumpable with VCD.
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0.00ns INFO [00000001] Resetting...
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9.00ns INFO [00000010] Releasing reset.
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15.00ns INFO [00000017] Writing Port 0 @00100000 00=633212F3
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17.00ns INFO [00000019] Reading Port 0 @00100000 00
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22.00ns INFO [00000024] Read Data: 633212F3
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22.00ns INFO [00000024] Writing Port 0 @00100001 01=6A0278C9
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24.00ns INFO [00000026] Reading Port 0 @00100001 01
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29.00ns INFO [00000031] Read Data: 6A0278C9
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...
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1769.00ns INFO [00001770] Writing W0@15=08675309...
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1769.00ns INFO [00001770] Scanning in...
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1798.00ns INFO [00001800] ...tick...
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1898.00ns INFO [00001900] ...tick...
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1998.00ns INFO [00002000] ...tick...
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2075.00ns INFO [00002076] Blipping RA0 clk...
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2098.00ns INFO [00002100] ...tick...
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2175.00ns INFO [00002176] Reading R0@15, R1@16...
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2175.00ns INFO [00002176] Scanning in...
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2198.00ns INFO [00002200] ...tick...
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2298.00ns INFO [00002300] ...tick...
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2398.00ns INFO [00002400] ...tick...
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2481.00ns INFO [00002482] Blipping RA0 clk...
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2498.00ns INFO [00002500] ...tick...
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2581.00ns INFO [00002582] Blipping RA0 clk...
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2598.00ns INFO [00002600] ...tick...
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2681.00ns INFO [00002682] Blipping RA0 clk...
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2698.00ns INFO [00002700] ...tick...
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2781.00ns INFO [00002782] Scanning out...
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2798.00ns INFO [00002800] ...tick...
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2898.00ns INFO [00002900] ...tick...
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2998.00ns INFO [00003000] ...tick...
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3035.00ns INFO [00003036] ScanData=78433A984C075227A100000000000000
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3035.00ns INFO [00003036] r0 adr:0F
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3035.00ns INFO [00003036] r0 dat:08675309
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3035.00ns INFO [00003036] r1 adr:10
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3035.00ns INFO [00003036] r1 dat:1D489E84
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3035.00ns INFO [00003036] w0 adr:00
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3035.00ns INFO [00003036] w0 dat:00000000
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3035.00ns INFO [00003036] cfg:00000
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3035.00ns INFO [00003036] Done
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3044.00ns INFO tb_site passed
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3044.00ns INFO **************************************************************************************
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** TEST STATUS SIM TIME (ns) REAL TIME (s) RATIO (ns/s) **
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**************************************************************************************
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** tb.tb_site PASS 3044.00 0.87 3517.25 **
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**************************************************************************************
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** TESTS=0 PASS=1 FAIL=0 SKIP=0 3044.00 0.89 3420.87 **
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**************************************************************************************
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``` |