Updated 2 months ago

This is the main libreBMC repo that contains an overview of the project and useful links. Start here.

Updated 2 months ago

High-specific-bandwidth memory design

Updated 1 month ago

Pointers to openBMC code needed to boot the AC922 using the FPGA

Updated 3 months ago

This repo houses or points to the gateware (FPGA image code) for the librebmc project

Updated 2 months ago

A tiny Open POWER ISA softcore written in VHDL 2008

Updated 4 months ago

OpenPOWER Foundation General Information & Repository Listing

Updated 4 months ago

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue

Updated 4 months ago

The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers

Updated 4 months ago

Updated 1 week ago

VHDL 2 1

The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers

Updated 2 months ago

Verilog 1 1

The A2O core was a follow-on to A2I, written in Verilog, and supported a lower thread count than A2I, but higher performance per thread, using out-of-order execution (register renaming, reservation stations, completion buffer) and a store queue

Updated 1 month ago

A tiny Open POWER ISA softcore written in VHDL 2008

Updated 6 days ago

Verilog 0 0

An experimental small core based on VexRiscv, written in Scala

Updated 1 month ago

OpenPOWER Foundation General Information & Repository Listing

Updated 6 months ago

Fork LibreBMC from page to edit the text.

Updated 3 weeks ago

Meeting Minutes for the OPF Academic BoF

Updated 8 months ago