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Design clean, reviewed, and issued to Fab at JLCPCB.

main jlcpcb_Jun6
Steven Roberts 6 months ago
parent
commit
118bbaf3e3
  1. BIN
      3D/ENG_CVM_CVM_2336568-1_2.3d_stp.zip
  2. 9268
      3D/TPS7A7100RGTR.STEP
  3. 8705
      3D/TPS7A7100RGWR.STEP
  4. 144751
      3D/c-2336568-1-2-3d.stp
  5. 25
      ac922interposer.pretty/SOT65P210X110-5N.kicad_mod
  6. 104
      bom2grouped_csv_jlcpcb.xsl
  7. 27
      kicad-TI_TPS3801/SOT65P210X110-5N.kicad_mod
  8. 23
      kicad-TI_TPS3801/TPS3801K33DCKR.lib
  9. 2449
      kicad-TI_TPS3801/TPS3801K33DCKR.step

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3D/ENG_CVM_CVM_2336568-1_2.3d_stp.zip

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3D/TPS7A7100RGTR.STEP

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3D/TPS7A7100RGWR.STEP

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3D/c-2336568-1-2-3d.stp

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25
ac922interposer.pretty/SOT65P210X110-5N.kicad_mod

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(module SOT65P210X110-5N (layer F.Cu) (tedit 609324BF)
(fp_text reference REF** (at 0.232 -1.9064) (layer F.SilkS)
(effects (font (size 0.64 0.64) (thickness 0.015)))
)
(fp_text value SOT65P210X110-5N (at 4.7024 1.9064) (layer F.Fab)
(effects (font (size 0.64 0.64) (thickness 0.015)))
)
(fp_line (start -0.625 1) (end -0.625 -1) (layer F.Fab) (width 0.127))
(fp_line (start -0.625 -1) (end 0.625 -1) (layer F.Fab) (width 0.127))
(fp_line (start 0.625 -1) (end 0.625 1) (layer F.Fab) (width 0.127))
(fp_line (start 0.625 1) (end -0.625 1) (layer F.Fab) (width 0.127))
(fp_line (start -0.625 -1.17) (end 0.625 -1.17) (layer F.SilkS) (width 0.127))
(fp_line (start 0.625 1.17) (end -0.625 1.17) (layer F.SilkS) (width 0.127))
(fp_line (start -1.81 1.33) (end -1.81 -1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.81 -1.33) (end 1.81 -1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.81 -1.33) (end 1.81 1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.81 1.33) (end -1.81 1.33) (layer F.CrtYd) (width 0.05))
(fp_circle (center -2.1 -0.65) (end -2 -0.65) (layer F.Fab) (width 0.2))
(fp_circle (center -2.1 -0.65) (end -2 -0.65) (layer F.SilkS) (width 0.2))
(pad 5 smd rect (at 0.96 -0.65) (size 1.19 0.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0.96 0.65) (size 1.19 0.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -0.96 0.65) (size 1.19 0.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -0.96 0) (size 1.19 0.4) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -0.96 -0.65) (size 1.19 0.4) (layers F.Cu F.Paste F.Mask))
)

104
bom2grouped_csv_jlcpcb.xsl

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<!--XSL style sheet to convert EESCHEMA XML Partlist Format to grouped CSV BOM Format
Copyright (C) 2014, Wolf Walter.
Copyright (C) 2013, Stefan Helmert.
Copyright (C) 2018, Kicad developers.
Copyright (C) 2019, arturo182.
GPL v2.

Functionality:
Generation of JLCPCB PCBA compatible BOM

How to use this is explained in eeschema.pdf chapter 14. You enter a command line into the
netlist exporter using a new (custom) tab in the netlist export dialog.
The command line is
xsltproc -o "%O.csv" "FullPathToFile/bom2grouped_csv_jlcpcb.xsl" "%I"
-->
<!--
@package
Generates a JLCPCB PCBA service compatible BOM

Functionality:
* Generate a comma separated value BOM list (csv file type).
* Components are sorted by ref and grouped by same value+footprint
One value per line
Fields are
Comment,Designator,Footprint,LCSC

The command line is
xsltproc -o "%O.csv" "full_path/bom2grouped_csv_jlcpcb.xsl" "%I"
-->


<!DOCTYPE xsl:stylesheet [
<!ENTITY nl "&#xd;&#xa;"> <!--new line CR, LF, or LF, your choice -->
]>


<xsl:stylesheet xmlns:xsl="http://www.w3.org/1999/XSL/Transform" version="1.0">
<xsl:output method="text"/>

<xsl:variable name="digits" select="'1234567890'" />

<!-- for matching grouping of footprint and value combination -->
<xsl:key name="partTypeByValueAndFootprint" match="comp" use="concat(footprint, '-', value)" />

<!-- for table head and empty table fields-->
<xsl:key name="headentr" match="field" use="@name"/>

<!-- main part -->
<xsl:template match="/export">
<xsl:text>Comment,Designator,Footprint,LCSC</xsl:text>
<!-- all table entries -->
<xsl:apply-templates select="components"/>
</xsl:template>

<xsl:template match="components">
<!-- for Muenchian grouping of footprint and value combination -->
<xsl:for-each select="comp[count(. | key('partTypeByValueAndFootprint', concat(footprint, '-', value))[1]) = 1]">
<xsl:sort select="@ref" />
<xsl:text>&nl;</xsl:text>
<xsl:text>"</xsl:text><xsl:value-of select="value"/><xsl:text>","</xsl:text>
<!-- list of all references -->
<xsl:for-each select="key('partTypeByValueAndFootprint', concat(footprint, '-', value))">
<!-- strip non-digits from reference and sort based on remaining number -->
<xsl:sort select="translate(@ref, translate(@ref, $digits, ''), '')" data-type="number" />
<xsl:value-of select="@ref"/>
<xsl:if test="position() != last()"><xsl:text>,</xsl:text></xsl:if>
</xsl:for-each>
<xsl:text>","</xsl:text>
<xsl:value-of select="footprint"/><xsl:text>","</xsl:text>
<xsl:value-of select="fields/field[@name='LCSC']"/><xsl:text>"</xsl:text>
</xsl:for-each>
</xsl:template>

<!-- table entries with dynamic table head -->
<xsl:template match="fields">

<!-- remember current fields section -->
<xsl:variable name="fieldvar" select="field"/>

<!-- for all existing head entries -->
<xsl:for-each select="/export/components/comp/fields/field[generate-id(.) = generate-id(key('headentr',@name)[1])]">
<xsl:variable name="allnames" select="@name"/>
<xsl:text>,"</xsl:text>

<!-- for all field entries in the remembered fields section -->
<xsl:for-each select="$fieldvar">

<!-- only if this field entry exists in this fields section -->
<xsl:if test="@name=$allnames">
<!-- content of the field -->
<xsl:value-of select="."/>
</xsl:if>
<!--
If it does not exist, use an empty cell in output for this row.
Every non-blank entry is assigned to its proper column.
-->
</xsl:for-each>

<xsl:text>"</xsl:text>
</xsl:for-each>
</xsl:template>

</xsl:stylesheet>

27
kicad-TI_TPS3801/SOT65P210X110-5N.kicad_mod

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(module SOT65P210X110-5N (layer F.Cu) (tedit 609324BF)
(descr "")
(fp_text reference REF** (at 0.232 -1.9064 0) (layer F.SilkS)
(effects (font (size 0.64 0.64) (thickness 0.015)))
)
(fp_text value SOT65P210X110-5N (at 4.7024 1.9064 0) (layer F.Fab)
(effects (font (size 0.64 0.64) (thickness 0.015)))
)
(fp_line (start -0.625 1.0) (end -0.625 -1.0) (layer F.Fab) (width 0.127))
(fp_line (start -0.625 -1.0) (end 0.625 -1.0) (layer F.Fab) (width 0.127))
(fp_line (start 0.625 -1.0) (end 0.625 1.0) (layer F.Fab) (width 0.127))
(fp_line (start 0.625 1.0) (end -0.625 1.0) (layer F.Fab) (width 0.127))
(fp_line (start -0.625 -1.17) (end 0.625 -1.17) (layer F.SilkS) (width 0.127))
(fp_line (start 0.625 1.17) (end -0.625 1.17) (layer F.SilkS) (width 0.127))
(fp_line (start -1.81 1.33) (end -1.81 -1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.81 -1.33) (end 1.81 -1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.81 -1.33) (end 1.81 1.33) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.81 1.33) (end -1.81 1.33) (layer F.CrtYd) (width 0.05))
(fp_circle (center -2.1 -0.65) (end -2.0 -0.65) (layer F.Fab) (width 0.2))
(fp_circle (center -2.1 -0.65) (end -2.0 -0.65) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -0.96 -0.65) (size 1.19 0.4) (layers F.Cu F.Mask F.Paste))
(pad 2 smd rect (at -0.96 0.0) (size 1.19 0.4) (layers F.Cu F.Mask F.Paste))
(pad 3 smd rect (at -0.96 0.65) (size 1.19 0.4) (layers F.Cu F.Mask F.Paste))
(pad 4 smd rect (at 0.96 0.65) (size 1.19 0.4) (layers F.Cu F.Mask F.Paste))
(pad 5 smd rect (at 0.96 -0.65) (size 1.19 0.4) (layers F.Cu F.Mask F.Paste))
)

23
kicad-TI_TPS3801/TPS3801K33DCKR.lib

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EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# TPS3801K33DCKR
#
DEF TPS3801K33DCKR U 0 40 Y Y 1 L N
F0 "U" -500 339 50 H V L BNN
F1 "TPS3801K33DCKR" -500 -457 50 H V L BNN
F2 "SOT65P210X110-5N" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
DRAW
S -500 -300 500 300 0 0 16 f
X ~MR 5 -700 0 200 R 40 40 0 0 I
X VDD 4 700 200 200 L 40 40 0 0 W
X ~RESET 3 700 0 200 L 40 40 0 0 O
X GND 1 700 -200 200 L 40 40 0 0 W
X GND 2 700 -200 200 L 40 40 0 0 W
ENDDRAW
ENDDEF
#
# End Library

2449
kicad-TI_TPS3801/TPS3801K33DCKR.step

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