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microwatt/tests/test_reservation.console_out

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tests: Add a test for the load-reserve and store-conditional instructions This checks that the instructions seem to update memory as expected, and also that they generate alignment interrupts when necessary. We don't check whether the memory update is atomic as we don't have SMP yet. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
test 01:PASS
test 02:PASS
tests: Add tests for lq/stq and lqarx/stqcx. Lq and stq are tested in both BE and LE modes (though only 64-bit mode) by the 'modes' test. Lqarx and stqcx. are tested by the 'reservation' test in LE mode mode (64-bit). Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
test 03:PASS