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test 01:PASS
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test 02:PASS
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test 03:PASS
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test 04:PASS
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test 05:PASS
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test 06:PASS
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FPU: Implement floating convert from integer instructions
This implements fcfid, fcfidu, fcfids and fcfidus, which convert
64-bit integer values in an FPR into a floating-point value.
This brings in a lot of the datapath that will be needed in
future, including the shifter, adder, mask generator and
count-leading-zeroes logic, along with the machinery for rounding
to single-precision or double-precision, detecting inexact results,
signalling inexact-result exceptions, and updating result flags
in the FPSCR.
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
4 years ago
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test 07:PASS
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test 08:PASS
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test 09:PASS
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test 10:PASS
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test 11:PASS
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test 12:PASS
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test 13:PASS
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test 14:PASS
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test 15:PASS
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test 16:PASS
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test 17:PASS
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test 18:PASS
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