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#ifndef __MICROWATT_SOC_H
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#define __MICROWATT_SOC_H
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/*
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* Microwatt SoC memory map
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*/
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#define MEMORY_BASE 0x00000000 /* "Main" memory alias, either BRAM or DRAM */
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#define DRAM_BASE 0x40000000 /* DRAM if present */
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#define BRAM_BASE 0x80000000 /* Internal BRAM */
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#define SYSCON_BASE 0xc0000000 /* System control regs */
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#define UART_BASE 0xc0002000 /* UART */
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#define XICS_BASE 0xc0004000 /* Interrupt controller */
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#define DRAM_CTRL_BASE 0xc0100000 /* LiteDRAM control registers */
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#define DRAM_INIT_BASE 0xf0000000 /* Internal DRAM init firmware */
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/*
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* Register definitions for the syscon registers
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*/
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#define SYS_REG_SIGNATURE 0x00
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#define SYS_REG_INFO 0x08
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#define SYS_REG_INFO_HAS_UART (1ull << 0)
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#define SYS_REG_INFO_HAS_DRAM (1ull << 1)
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#define SYS_REG_INFO_HAS_BRAM (1ull << 2)
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#define SYS_REG_BRAMINFO 0x10
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#define SYS_REG_DRAMINFO 0x18
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#define SYS_REG_CLKINFO 0x20
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#define SYS_REG_CTRL 0x28
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#define SYS_REG_CTRL_DRAM_AT_0 (1ull << 0)
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#define SYS_REG_CTRL_CORE_RESET (1ull << 1)
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#define SYS_REG_CTRL_SOC_RESET (1ull << 2)
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#define SYS_REG_DRAMINITINFO 0x30
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/*
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* Register definitions for the potato UART
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*/
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#define POTATO_CONSOLE_TX 0x00
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#define POTATO_CONSOLE_RX 0x08
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#define POTATO_CONSOLE_STATUS 0x10
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#define POTATO_CONSOLE_STATUS_RX_EMPTY 0x01
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#define POTATO_CONSOLE_STATUS_TX_EMPTY 0x02
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#define POTATO_CONSOLE_STATUS_RX_FULL 0x04
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#define POTATO_CONSOLE_STATUS_TX_FULL 0x08
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#define POTATO_CONSOLE_CLOCK_DIV 0x18
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#define POTATO_CONSOLE_IRQ_EN 0x20
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#endif /* __MICROWATT_SOC_H */
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