Orange Crab is 48MHz not 50MHz, bump PLL frequency

I'm not sure why I set the input frequency for the Orange Crab to 50MHz. Since we easily make timing now, bump our output frequency to 48MHz as well. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
3 years ago · 06266fe84a
parent 0a415410c9
commit 06266fe84a
1 changed files with 3 additions and 3 deletions
--- a/6
+++ b/6
@ -157,11 +157,11 @@ ICACHE_NUM_LINES=4
 # OrangeCrab with ECP85
 ifeq ($(FPGA_TARGET), ORANGE-CRAB)
 RESET_LOW=true
-CLK_INPUT=50000000
-CLK_FREQUENCY=40000000
+CLK_INPUT=48000000
+CLK_FREQUENCY=48000000
 LPF=constraints/orange-crab.lpf
 PACKAGE=CSFBGA285
-NEXTPNR_FLAGS=--um5g-85k --freq 40
+NEXTPNR_FLAGS=--um5g-85k --freq 48
 OPENOCD_JTAG_CONFIG=openocd/olimex-arm-usb-tiny-h.cfg
 OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
 endif