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5ae5f76558
The DRAM related pins have some small changes in LiteX, so resync and add the false path information as well. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
4 years ago | |
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.. | ||
LICENSE | ||
arty_a7.xdc | 4 years ago | |
clk_gen_bypass.vhd | 5 years ago | |
clk_gen_mcmm.vhd | 5 years ago | |
clk_gen_plle2.vhd | 5 years ago | |
cmod_a7-35.xdc | 5 years ago | |
firmware.hex | 5 years ago | |
hello_world.hex | 5 years ago | |
main_bram.vhdl | 5 years ago | |
nexys-video.xdc | 4 years ago | |
nexys_a7.xdc | 5 years ago | |
pp_fifo.vhd | 5 years ago | |
pp_soc_uart.vhd | 5 years ago | |
pp_utilities.vhd | ||
soc_reset.vhdl | 5 years ago | |
soc_reset_tb.vhdl | 5 years ago | |
top-arty.vhdl | 4 years ago | |
top-generic.vhdl | 5 years ago | |
top-nexys-video.vhdl | 4 years ago |