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microwatt/fpga
Benjamin Herrenschmidt c19b5b8cc7 litedram: Update to new LiteX/LiteDRAM version
Things have changed a bit in upstream LiteX. LiteDRAM now exposes a
wishbone for the CSRs for example.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
..
LICENSE
arty_a7.xdc fpga: Hookup Arty to litedram 5 years ago
clk_gen_bypass.vhd
clk_gen_mcmm.vhd
clk_gen_plle2.vhd
cmod_a7-35.xdc Add SPI configuration to Xilinx constraint files 5 years ago
firmware.hex
hello_world.hex hello_world: Use new headers and frequency from syscon 5 years ago
main_bram.vhdl Fix some ghdlsynth issues with fpga_bram 5 years ago
nexys-video.xdc fpga: Hookup nexys-video to litedram 5 years ago
nexys_a7.xdc Add SPI configuration to Xilinx constraint files 5 years ago
pp_fifo.vhd pp_fifo: Fix full fifo losing all data on simultaneous push & pop 5 years ago
pp_soc_uart.vhd pp_soc_uart: Fix rx synchronizers and ensure stable tx init state 5 years ago
pp_utilities.vhd
soc_reset.vhdl
soc_reset_tb.vhdl
top-arty.vhdl litedram: Update to new LiteX/LiteDRAM version 5 years ago
top-generic.vhdl fpga: Hookup Arty to litedram 5 years ago
top-nexys-video.vhdl litedram: Update to new LiteX/LiteDRAM version 5 years ago