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Benjamin Herrenschmidt 310a56c076 Re-indent and reformat soc.vhdl ... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>		6 years ago
..
LICENSE	Initial import of microwatt	6 years ago
arty_a7-35.xdc	Merge pull request #20 from antonblanchard/reset-rework2	6 years ago
clk_gen_bypass.vhd	Rework SOC reset	6 years ago
clk_gen_mcmm.vhd	Cmod A7-35 support	6 years ago
clk_gen_plle2.vhd	Rework SOC reset	6 years ago
cmod_a7-35.xdc	Cmod A7-35 support	6 years ago
firmware.hex	Add a few more FPGA related files	6 years ago
hello_world.hex	Rebuild hello world assuming a 50MHz clock	6 years ago
nexys-video.xdc	Rename a few reset signals	6 years ago
nexys_a7.xdc	Merge pull request #20 from antonblanchard/reset-rework2	6 years ago
nodivide.patch	Add a few more FPGA related files	6 years ago
pp_fifo.vhd	Initial import of microwatt	6 years ago
pp_soc_memory.vhd	Fix ghdl build error with pp_soc_memory	6 years ago
pp_soc_uart.vhd	Initial import of microwatt	6 years ago
pp_utilities.vhd	Initial import of microwatt	6 years ago
soc.vhdl	Re-indent and reformat soc.vhdl	6 years ago
soc_reset.vhdl	Rework SOC reset	6 years ago
soc_reset_tb.vhdl	Rework SOC reset	6 years ago
toplevel.vhdl	Split FPGA toplevel from soc	6 years ago