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microwatt/fpga
Benjamin Herrenschmidt 9961d70dfb Improve PLL/MMCM clocks configuration
We can now pass both the input clock and target clock frequency
via generics. Add support for both 50Mhz and 100Mhz target freqs
for both cases.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
..
LICENSE
arty_a7.xdc
clk_gen_bypass.vhd
clk_gen_mcmm.vhd Improve PLL/MMCM clocks configuration 5 years ago
clk_gen_plle2.vhd Improve PLL/MMCM clocks configuration 5 years ago
cmod_a7-35.xdc
firmware.hex
hello_world.hex
mw_soc_memory.vhdl
nexys-video.xdc
nexys_a7.xdc
pp_fifo.vhd
pp_soc_uart.vhd
pp_utilities.vhd
soc_reset.vhdl
soc_reset_tb.vhdl
toplevel.vhdl Improve PLL/MMCM clocks configuration 5 years ago