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microwatt
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fpu-init
loadstore-init
core_debug-init
icache-unused-sig
icache-insn-u-state
dcache-unused-sig
unused-sig
divider-init
loadstore-pmu-init
icache-pmu-events
fpu-typo
less-fpga-init
caravel-mpw6-20220530
caravel-mpw5-20220323
caravel-mpw5-20220322
alt-reset-address
log2ceil-issue
fpu-constant
asic-3
boxarty-20211011
icbi-issue
orange-crab-freq
dcache-nc-fix
remove-potato-uart
cache-tlb-parameters-2
caravel-20210114
caravel-20210105
jtag-port-2
jtag-port
nia-debug
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microwatt/asic
History
Anton Blanchard 49b332e17f Hook up JTAG to ASIC top level 
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 		3 years ago
..
behavioural Add arrays for ASIC flow 3 years ago
cache_ram.vhdl Add arrays for ASIC flow 3 years ago
main_bram.vhdl Move register stage from after RAM to before RAM 3 years ago
microwatt_asic-verilator.cpp Add ASIC target 3 years ago
multiply.vhdl Add arrays for ASIC flow 3 years ago
register_file.vhdl Add arrays for ASIC flow 3 years ago
top-asic.vhdl Hook up JTAG to ASIC top level 3 years ago