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31 lines
1.0 KiB
VHDL
31 lines
1.0 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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package sim_console is
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procedure sim_console_read (val: out std_ulogic_vector(63 downto 0));
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attribute foreign of sim_console_read : procedure is "VHPIDIRECT sim_console_read";
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procedure sim_console_poll (val: out std_ulogic_vector(63 downto 0));
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attribute foreign of sim_console_poll : procedure is "VHPIDIRECT sim_console_poll";
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procedure sim_console_write (val: std_ulogic_vector(63 downto 0));
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attribute foreign of sim_console_write : procedure is "VHPIDIRECT sim_console_write";
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end sim_console;
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package body sim_console is
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procedure sim_console_read (val: out std_ulogic_vector(63 downto 0)) is
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begin
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assert false report "VHPI" severity failure;
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end sim_console_read;
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procedure sim_console_poll (val: out std_ulogic_vector(63 downto 0)) is
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begin
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assert false report "VHPI" severity failure;
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end sim_console_poll;
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procedure sim_console_write (val: std_ulogic_vector(63 downto 0)) is
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begin
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assert false report "VHPI" severity failure;
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end sim_console_write;
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end sim_console;
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