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microwatt/fpga
Benjamin Herrenschmidt 79b0b9a046 Fix PLL reset signal name in toplevel
It shouldn't have a _n suffix, it's active positive.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
..
LICENSE Initial import of microwatt 5 years ago
arty_a7-35.xdc Merge pull request #20 from antonblanchard/reset-rework2 5 years ago
clk_gen_bypass.vhd Fix clk_gen_bypass 5 years ago
clk_gen_mcmm.vhd Remove names from end record statements 5 years ago
clk_gen_plle2.vhd Remove names from end record statements 5 years ago
cmod_a7-35.xdc Cmod A7-35 support 5 years ago
firmware.hex Add a few more FPGA related files 5 years ago
hello_world.hex Rebuild hello world assuming a 50MHz clock 5 years ago
mw_soc_memory.vhdl SOC memory wishbone should clear ACK regardless of STB 5 years ago
nexys-video.xdc Rename a few reset signals 5 years ago
nexys_a7.xdc Merge pull request #20 from antonblanchard/reset-rework2 5 years ago
pp_fifo.vhd Initial import of microwatt 5 years ago
pp_soc_uart.vhd Initial import of microwatt 5 years ago
pp_utilities.vhd Initial import of microwatt 5 years ago
soc_reset.vhdl Rework SOC reset 5 years ago
soc_reset_tb.vhdl Rework SOC reset 5 years ago
toplevel.vhdl Fix PLL reset signal name in toplevel 5 years ago