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microwatt/fpga
Benjamin Herrenschmidt 8366710217 liteeth: Hook up LiteX LiteEth ethernet controller
Currently only generated for Arty.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 years ago
..
LICENSE
arty_a7.xdc liteeth: Hook up LiteX LiteEth ethernet controller 5 years ago
clk_gen_bypass.vhd
clk_gen_mcmm.vhd
clk_gen_plle2.vhd
cmod_a7-35.xdc
firmware.hex
hello_world.hex
main_bram.vhdl
nexys-video.xdc
nexys_a7.xdc
pp_fifo.vhd
pp_soc_uart.vhd uart: Remove combinational loops on ack and stall signal 5 years ago
pp_utilities.vhd
soc_reset.vhdl
soc_reset_tb.vhdl
top-arty.vhdl liteeth: Hook up LiteX LiteEth ethernet controller 5 years ago
top-generic.vhdl soc: Don't require dram wishbones signals to be wired by toplevel 5 years ago
top-nexys-video.vhdl soc: Rename wb_dram_ctrl to wb_ext_io and rework decoding 5 years ago