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fpu-init
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microwatt/litedram/gen-src
History
Benjamin Herrenschmidt 3167515069 sw: Properly mask syscon register fields 
Some fields might get extended with extra bits, use the appropriate
masks when reading the values.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 		5 years ago
..
sdram_init sw: Properly mask syscon register fields 5 years ago
arty.yml litedram: Remove old "VexRiscV" based initializations 5 years ago
dram-init-mem.vhdl litedram: Add support for booting without BRAM 5 years ago
generate.py litedram: Remove old "VexRiscV" based initializations 5 years ago
nexys-video.yml litedram: Remove old "VexRiscV" based initializations 5 years ago
no-init-mem.vhdl litedram: Split the init memory from the main wrapper 5 years ago
sim.yml litedram: Remove old "VexRiscV" based initializations 5 years ago