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Benjamin Herrenschmidt b46f81fae4 Wishbone debug module 
This adds a debug module off the DMI (debug) bus which can act as a
wishbone master to generate read and write cycles.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
..
dependencies.py Initial import of microwatt
hash.py Initial import of microwatt
mw_debug.py Wishbone debug module
run_test.sh Initial import of microwatt
test_micropython.py Initial import of microwatt
test_micropython_long.py Initial import of microwatt
verific.sh Fix verific script with new VHDL files