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fpu-init
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icache-unused-sig
icache-insn-u-state
dcache-unused-sig
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divider-init
loadstore-pmu-init
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log2ceil-issue
fpu-constant
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microwatt/scripts
History
Anton Blanchard 467630573c Dump CTR, LR and CR on sim termination, and update our tests 
Right now our test cases fold the SPRs into the GPRs. That makes
debugging fails more difficult than it needs to be, so print
out the CTR, LR and CR.

We still need to print the XER, but that is in two spots in microwatt
and will take some more work.

This also adds many instructions to the tests that we have added
lately including overflow instructions, CR logicals and mt/mfxer.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
 		5 years ago
..
mw_debug New C based JTAG debug tool 5 years ago
dependencies.py Initial import of microwatt 5 years ago
gen_icache_tb.py icache_tb: Improve test and include test file 5 years ago
run_test.sh Dump CTR, LR and CR on sim termination, and update our tests 5 years ago
test_micropython.py ram: Rework main RAM interface 5 years ago
test_micropython_long.py ram: Rework main RAM interface 5 years ago
verific.sh Fix verific script with new VHDL files 5 years ago