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| title | date | categories | tags | ||
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| How Parallelware Technology Eases HPC Software Development for POWER Systems | 2019-01-22 |
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Featuring OpenPOWER member: Appentra
By Ganesan Narayanasamy, senior technical computing solution and client care manager, IBM
The 3rd OpenPOWER Academic Discussion Group Workshop was a great meeting of more than 40 developers, researchers and partners all working on Power. I’ve already summarized two sessions led by speakers from Oak Ridge National Laboratory – Early Application Experiences on Summit and Targeting GPUs using OpenMP Directives on Summit.
Manuel Arenaz, CEO and co-founder of Appentra, led a session designed to answer an important question: is there a need for parallelware tools on POWER systems? According to Arenaz, there is of course incredible computational power in even a single node of a Power-based supercomputer like Summit. But there are also a number of parallel programming challenges:
- Parallel programming of many-core processors
- Parallel programming of multiple GPUs
- Data movement through a heterogeneous complex memory hierarchy
- Training of computational researchers and engineers
- Porting of existing codes to pre-exascale systems
Appentra’s efforts to make code parallel and help developers make the most of high performance computing resources can help solve these challenges. Parallelware Trainer is an interactive tool that acts as a virtual mentor to provide faster, more effective learning. And Parallelware Analyzer (still in beta) is a command-line reporting tool to improve productivity of HPC application developers.
Appentra plans to certify both Parallelware tools as OpenPOWER Ready in 2019.
For more detail on the product roadmap of Parallelware Trainer and Parallelware Analyzer, view Arenaz’ full session video and slides below.
https://www.youtube.com/watch?v=6unHYjQruEg
How Parallelware technology eases HPC software development for POWER systems from Ganesan Narayanasamy