Browse Source

Address a few review comments from Will Schmidt.

master
Bill Schmidt 1 year ago
parent
commit
03b142e07a
  1. 2
      Intrinsics_Reference/ch_intro.xml
  2. 6
      Intrinsics_Reference/ch_techniques.xml
  3. 20
      Intrinsics_Reference/ch_vec_reference.xml

2
Intrinsics_Reference/ch_intro.xml

@ -381,7 +381,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro"> @@ -381,7 +381,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_intro">
AIX, POWER7, POWER8, POWER9, and Power10 are trademarks or
registered trademarks of International Business Machines
Corporation. Linux is a registered trademark of Linus
Torvalds. Intel is s registered trademark of Intel Corporation
Torvalds. Intel is a registered trademark of Intel Corporation
or its subsidiaries. AltiVec is a trademark of Freescale
Semiconductor, Inc.
</para>

6
Intrinsics_Reference/ch_techniques.xml

@ -254,9 +254,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques"> @@ -254,9 +254,9 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="section_techniques">
Access to the portability APIs occurs automatically when
including one of the corresponding Intel header files, such as
<code>&lt;mmintrin.h&gt;</code>. <phrase
revisionflag="added">You must also compile with
<code>-DNO_WARN_X86_INTRINSICS</code> to opt into using the
headers.</phrase>
revisionflag="added">To enable the portability headers, you
must compile with
<code>-DNO_WARN_X86_INTRINSICS</code>.</phrase>
</para>
</section>
<section xml:id="VIPR.techniques.pveclib">

20
Intrinsics_Reference/ch_vec_reference.xml

@ -10255,7 +10255,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -10255,7 +10255,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
None.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>
@ -19618,7 +19618,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -19618,7 +19618,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
not address an element boundary.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>
@ -41617,11 +41617,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -41617,11 +41617,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<emphasis role="bold">a</emphasis> and <emphasis
role="bold">b</emphasis>, with <emphasis
role="bold">a</emphasis> on the left. Let <emphasis
role="bold">v'</emphasis> be <emphasis role="bold">v</emphasis>
role="bold">w</emphasis> be <emphasis role="bold">v</emphasis>
shifted left by the number of bits specified by <emphasis
role="bold">c</emphasis>. Then <emphasis
role="bold">r</emphasis> is set to the leftmost 128 bits of
<emphasis role="bold">v'</emphasis>.
<emphasis role="bold">w</emphasis>.
</para>
<para><emphasis role="bold">Endian considerations:</emphasis>
The semantics of this built-in function differ for big-endian
@ -41632,7 +41632,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -41632,7 +41632,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
0 and 7, inclusive.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>
@ -43843,7 +43843,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -43843,7 +43843,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
None.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>
@ -43952,7 +43952,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -43952,7 +43952,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
targets, and right-to-left for little-endian targets.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>
@ -45129,11 +45129,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -45129,11 +45129,11 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
<emphasis role="bold">a</emphasis> and <emphasis
role="bold">b</emphasis>, with <emphasis
role="bold">a</emphasis> on the left. Let <emphasis
role="bold">v'</emphasis> be <emphasis role="bold">v</emphasis>
role="bold">w</emphasis> be <emphasis role="bold">v</emphasis>
shifted right by the number of bits specified by <emphasis
role="bold">c</emphasis>. Then <emphasis
role="bold">r</emphasis> is set to the rightmost 128 bits of
<emphasis role="bold">v'</emphasis>.
<emphasis role="bold">w</emphasis>.
</para>
<para><emphasis role="bold">Endian considerations:</emphasis>
The semantics of this built-in function differ for big-endian
@ -45144,7 +45144,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref"> @@ -45144,7 +45144,7 @@ xmlns:xlink="http://www.w3.org/1999/xlink" xml:id="VIPR.vec-ref">
0 and 7, inclusive.
</para>
<para><emphasis role="bold">Review status:</emphasis>
Not yet reviewed.
Reviewed by Will Schmidt.
</para>
<indexterm>

Loading…
Cancel
Save