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Add Table 2.3, Endian-Sensitive Built-In Functions

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This fixes #7.

Signed-off-by: Bill Schmidt <wschmidt@linux.ibm.com>
pull/69/head
Bill Schmidt 5 years ago
parent a661a3a7f0
commit cd80528095
1 changed files with 253 additions and 16 deletions
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269
Intrinsics_Reference/ch_biendian.xml
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@ -755,6 +755,13 @@ a[3] = c;</programlisting>
compiler are free to use other methods to implement the compiler are free to use other methods to implement the
specified semantics. specified semantics.
</para> </para>
<para>
Of course, most built-in functions operate only on corresponding
sets of elements of input vectors to produce output vectors, and
thus are not "endian-sensitive." A complete list of
endian-sensitive built-in functions can be found in <xref
linkend="VIPR.biendian.sensitive" />.
</para>
<section> <section>
<title>Extended Data Movement Functions</title> <title>Extended Data Movement Functions</title>
<para> <para>
@ -768,6 +775,22 @@ a[3] = c;</programlisting>
by the compiler to reflect little-endian operation during code by the compiler to reflect little-endian operation during code
generation. generation.
</para> </para>
<para>
Before the bi-endian programming model was introduced, the
<code>vec_lvsl</code> and <code>vec_lvsr</code> intrinsics
were supported. These could be used in conjunction with
<code>vec_perm</code> and VMX load and store instructions for
unaligned access. The <code>vec_lvsl</code> and
<code>vec_lvsr</code> interfaces are deprecated in accordance
with the interfaces specified here. For compatibility, the
built-in pseudo sequences published in previous VMX documents
continue to work with little-endian data layout and the
little-endian vector layout described in this document.
However, the use of these sequences in new code is discouraged
and usually results in worse performance. It is recommended
that compilers issue a warning when these functions are used
in little-endian environments.
</para>
<table frame="all" pgwide="1" xml:id="VIPR.biendian.vmx-mem"> <table frame="all" pgwide="1" xml:id="VIPR.biendian.vmx-mem">
<title>VMX Memory Access Built-In Functions</title> <title>VMX Memory Access Built-In Functions</title>
<tgroup cols="3"> <tgroup cols="3">
@ -864,22 +887,6 @@ a[3] = c;</programlisting>
</tbody> </tbody>
</tgroup> </tgroup>
</table> </table>
<para>
Before the bi-endian programming model was introduced, the
<code>vec_lvsl</code> and <code>vec_lvsr</code> intrinsics
were supported. These could be used in conjunction with
<code>vec_perm</code> and VMX load and store instructions for
unaligned access. The <code>vec_lvsl</code> and
<code>vec_lvsr</code> interfaces are deprecated in accordance
with the interfaces specified here. For compatibility, the
built-in pseudo sequences published in previous VMX documents
continue to work with little-endian data layout and the
little-endian vector layout described in this document.
However, the use of these sequences in new code is discouraged
and usually results in worse performance. It is recommended
that compilers issue a warning when these functions are used
in little-endian environments.
</para>
<para> <para>
Instead, it is recommended that programmers use the Instead, it is recommended that programmers use the
<code>vec_xl</code> and <code>vec_xst</code> vector built-in <code>vec_xl</code> and <code>vec_xst</code> vector built-in
@ -888,6 +895,236 @@ a[3] = c;</programlisting>
linkend="VIPR.vec-ref" /> for further description and linkend="VIPR.vec-ref" /> for further description and
implementation details. implementation details.
</para> </para>
<table frame="all" pgwide="1" xml:id="VIPR.biendian.sensitive">
<title>Endian-Sensitive Built-In Functions</title>
<tgroup cols="3">
<colspec colname="c1" colwidth="15*" align="center" />
<colspec colname="c2" colwidth="15*" align="center" />
<colspec colname="c3" colwidth="10*" align="center" />
<tbody>
<row>
<entry>
<para>vec_bperm</para>
</entry>
<entry>
<para>vec_mergeo</para>
</entry>
<entry>
<para>vec_sld</para>
</entry>
</row>
<row>
<entry>
<para>vec_cipher_be</para>
</entry>
<entry>
<para>vec_mfvscr</para>
</entry>
<entry>
<para>vec_sldw</para>
</entry>
</row>
<row>
<entry>
<para>vec_cipherlast_be</para>
</entry>
<entry>
<para>vec_mule</para>
</entry>
<entry>
<para>vec_sll</para>
</entry>
</row>
<row>
<entry>
<para>vec_doublee</para>
</entry>
<entry>
<para>vec_mulo</para>
</entry>
<entry>
<para>vec_slo</para>
</entry>
</row>
<row>
<entry>
<para>vec_doubleh</para>
</entry>
<entry>
<para>vec_ncipher_be</para>
</entry>
<entry>
<para>vec_slv</para>
</entry>
</row>
<row>
<entry>
<para>vec_doublel</para>
</entry>
<entry>
<para>vec_ncipherlast_be</para>
</entry>
<entry>
<para>vec_splat</para>
</entry>
</row>
<row>
<entry>
<para>vec_doubleo</para>
</entry>
<entry>
<para>vec_pack</para>
</entry>
<entry>
<para>vec_srl</para>
</entry>
</row>
<row>
<entry>
<para>vec_extract</para>
</entry>
<entry>
<para>vec_pack_to_short_fp32</para>
</entry>
<entry>
<para>vec_sro</para>
</entry>
</row>
<row>
<entry>
<para>vec_extract_fp32_from_shorth</para>
</entry>
<entry>
<para>vec_packpx</para>
</entry>
<entry>
<para>vec_srv</para>
</entry>
</row>
<row>
<entry>
<para>vec_extract_fp32_from_shortl</para>
</entry>
<entry>
<para>vec_packs</para>
</entry>
<entry>
<para>vec_sum2s</para>
</entry>
</row>
<row>
<entry>
<para>vec_extract_4b</para>
</entry>
<entry>
<para>vec_packsu</para>
</entry>
<entry>
<para>vec_sums</para>
</entry>
</row>
<row>
<entry>
<para>vec_float2</para>
</entry>
<entry>
<para>vec_perm</para>
</entry>
<entry>
<para>vec_unpackh</para>
</entry>
</row>
<row>
<entry>
<para>vec_floate</para>
</entry>
<entry>
<para>vec_permxor</para>
</entry>
<entry>
<para>vec_unpackl</para>
</entry>
</row>
<row>
<entry>
<para>vec_floato</para>
</entry>
<entry>
<para>vec_pmsum_be</para>
</entry>
<entry>
<para>vec_unsigned2</para>
</entry>
</row>
<row>
<entry>
<para>vec_gb</para>
</entry>
<entry>
<para>vec_reve</para>
</entry>
<entry>
<para>vec_unsignede</para>
</entry>
</row>
<row>
<entry>
<para>vec_insert</para>
</entry>
<entry>
<para>vec_sbox_be</para>
</entry>
<entry>
<para>vec_unsignedo</para>
</entry>
</row>
<row>
<entry>
<para>vec_insert_4b</para>
</entry>
<entry>
<para>vec_shasigma_be</para>
</entry>
<entry>
<para>vec_xl (ISA 2.07 only)</para>
</entry>
</row>
<row>
<entry>
<para>vec_mergee</para>
</entry>
<entry>
<para>vec_signed2</para>
</entry>
<entry>
<para>vec_xl_be</para>
</entry>
</row>
<row>
<entry>
<para>vec_mergeh</para>
</entry>
<entry>
<para>vec_signede</para>
</entry>
<entry>
<para>vec_xst (ISA 2.07 only)</para>
</entry>
</row>
<row>
<entry>
<para>vec_mergel</para>
</entry>
<entry>
<para>vec_signedo</para>
</entry>
<entry>
<para>vec_xst_be</para>
</entry>
</row>
</tbody>
</tgroup>
</table>
</section> </section>
<section xml:id="VIPR.biendian.BELE"> <section xml:id="VIPR.biendian.BELE">
<title>Big-Endian Vector Layout in Little-Endian Environments <title>Big-Endian Vector Layout in Little-Endian Environments

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