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@ -18,4 +18,8 @@ prj.add_library("top").add_source_files(_rel / "src" / "vhdl" / "work" / "*.vhdl
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# Simulation only library containing VHDL mocks for Verilog UNIMACROs
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# Simulation only library containing VHDL mocks for Verilog UNIMACROs
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prj.add_library("unimacro").add_source_files(_rel / "sim" / "unimacro" / "*.vhdl")
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prj.add_library("unimacro").add_source_files(_rel / "sim" / "unimacro" / "*.vhdl")
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# The code isn't strictly compliant with the VHDL standard which causes some simulators
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# to fail compilation. In GHDL these errors can be relaxed to warnings.
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prj.set_compile_option("ghdl.a_flags", ["-frelaxed"])
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prj.main()
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prj.main()
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